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This commit is contained in:
Emil J. Tywoniak 2026-06-10 19:22:53 +02:00
parent 015ab4e45b
commit f592f2f3af
203 changed files with 4575 additions and 4481 deletions
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6
techlibs/anlogic/anlogic_fixcarry.cc
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@ -79,9 +79,9 @@ static void fix_carry_chain(Module *module)
SigBit canonical_bit = sigmap(bit_ci);
auto bit = mapping_bits.at(canonical_bit);
log("Fixing %s cell named %s breaking carry chain.\n", cell->type.unescape(), cell);
Cell *c = module->addCell(NEW_ID, ID(AL_MAP_ADDER));
SigBit new_bit = module->addWire(NEW_ID);
SigBit dummy_bit = module->addWire(NEW_ID);
Cell *c = module->addCell(NEW_TWINE, ID(AL_MAP_ADDER));
SigBit new_bit = module->addWire(NEW_TWINE);
SigBit dummy_bit = module->addWire(NEW_TWINE);
SigSpec bits;
bits.append(dummy_bit);
bits.append(new_bit);