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https://github.com/YosysHQ/yosys
synced 2026-07-15 03:35:40 +00:00
WIP
This commit is contained in:
Emil J. Tywoniak
parent
015ab4e45b
commit
f592f2f3af
203 changed files with 4575 additions and 4481 deletions
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@ -213,9 +213,9 @@ struct BoothPassWorker {
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bool is_signed;
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if (cell->type == ID($mul)) {
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A = cell->getPort(ID::A);
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B = cell->getPort(ID::B);
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Y = cell->getPort(ID::Y);
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A = cell->getPort(TW::A);
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B = cell->getPort(TW::B);
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Y = cell->getPort(TW::Y);
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log_assert(cell->getParam(ID::A_SIGNED).as_bool() == cell->getParam(ID::B_SIGNED).as_bool());
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is_signed = cell->getParam(ID::A_SIGNED).as_bool();
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@ -231,7 +231,7 @@ struct BoothPassWorker {
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A = macc.terms[0].in_a;
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B = macc.terms[0].in_b;
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is_signed = macc.terms[0].is_signed;
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Y = cell->getPort(ID::Y);
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Y = cell->getPort(TW::Y);
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} else {
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continue;
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}
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@ -290,7 +290,7 @@ struct BoothPassWorker {
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int required_op_size = x_sz_revised + y_sz_revised;
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if (required_op_size != z_sz) {
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SigSpec expanded_Y = module->addWire(NEW_ID, required_op_size);
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SigSpec expanded_Y = module->addWire(NEW_TWINE, required_op_size);
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SigSpec Y_driver = expanded_Y;
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Y_driver.extend_u0(Y.size(), is_signed);
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module->connect(Y, Y_driver);
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@ -518,29 +518,29 @@ struct BoothPassWorker {
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int ix = 0;
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for (auto csa_elem : csa_tree) {
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printf("\tCell %d %s type %s\n", ix, csa_elem->name.c_str(), csa_elem->type.c_str());
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if (csa_elem->getPort(ID::A) == State::S0)
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if (csa_elem->getPort(TW::A) == State::S0)
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printf("\tA set to constant 0\n");
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else if (csa_elem->getPort(ID::A) == State::S1)
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else if (csa_elem->getPort(TW::A) == State::S1)
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printf("\tA set to constant 1\n");
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else
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printf("\tA driven by %s\n", csa_elem->getPort(ID::A).as_wire()->name.c_str());
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printf("\tA driven by %s\n", csa_elem->getPort(TW::A).as_wire()->name.c_str());
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if (csa_elem->getPort(ID::B) == State::S0)
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if (csa_elem->getPort(TW::B) == State::S0)
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printf("\tB set to constant 0\n");
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else if (csa_elem->getPort(ID::B) == State::S1)
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else if (csa_elem->getPort(TW::B) == State::S1)
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printf("\tB set to constant 1\n");
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else
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printf("\tB driven by %s\n", csa_elem->getPort(ID::B).as_wire()->name.c_str());
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printf("\tB driven by %s\n", csa_elem->getPort(TW::B).as_wire()->name.c_str());
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if (csa_elem->getPort(ID::C) == State::S0)
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if (csa_elem->getPort(TW::C) == State::S0)
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printf("\tC set to constant 0\n");
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else if (csa_elem->getPort(ID::C) == State::S1)
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else if (csa_elem->getPort(TW::C) == State::S1)
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printf("\tC set to constant 1\n");
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else
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printf("\tC driven by %s\n", csa_elem->getPort(ID::C).as_wire()->name.c_str());
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printf("\tC driven by %s\n", csa_elem->getPort(TW::C).as_wire()->name.c_str());
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printf("Carry out: %s\n", csa_elem->getPort(ID::X).as_wire()->name.c_str());
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printf("Sum out: %s\n", csa_elem->getPort(ID::Y).as_wire()->name.c_str());
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printf("Carry out: %s\n", csa_elem->getPort(TW::X).as_wire()->name.c_str());
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printf("Sum out: %s\n", csa_elem->getPort(TW::Y).as_wire()->name.c_str());
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ix++;
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}
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@ -718,7 +718,7 @@ struct BoothPassWorker {
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// End Case
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else if (n == s_vec.size() - 1) {
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// Make the carry results.. Two extra bits after fa.
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SigBit carry_out = module->addWire(NEW_ID, 1);
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SigBit carry_out = module->addWire(NEW_TWINE, 1);
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module->addFa(NEW_ID_SUFFIX(stringf("cpa_%d_fa_%d", cpa_id, n)),
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/* A */ s_vec[n],
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/* B */ c_vec[n - 1],
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@ -746,7 +746,7 @@ struct BoothPassWorker {
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}
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// Step case
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else {
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SigBit carry_out = module->addWire(NEW_ID_SUFFIX(stringf("cpa_%d_carry_%d", cpa_id, n)), 1);
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SigBit carry_out = module->addWire(NEW_TWINE_SUFFIX(stringf("cpa_%d_carry_%d", cpa_id, n)), 1);
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module->addFa(NEW_ID_SUFFIX(stringf("cpa_%d_fa_%d", cpa_id, n)),
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/* A */ s_vec[n],
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/* B */ c_vec[n - 1],
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@ -785,8 +785,8 @@ struct BoothPassWorker {
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if (first_csa_ips.size() > 0) {
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// build the first csa
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auto s_wire = module->addWire(NEW_ID_SUFFIX(stringf("csa_%d_%d_s", column_ix, csa_ix + 1)), 1);
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auto c_wire = module->addWire(NEW_ID_SUFFIX(stringf("csa_%d_%d_c", column_ix, csa_ix + 1)), 1);
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auto s_wire = module->addWire(NEW_TWINE_SUFFIX(stringf("csa_%d_%d_s", column_ix, csa_ix + 1)), 1);
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auto c_wire = module->addWire(NEW_TWINE_SUFFIX(stringf("csa_%d_%d_c", column_ix, csa_ix + 1)), 1);
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auto csa = module->addFa(NEW_ID_SUFFIX(stringf("csa_%d_%d", column_ix, csa_ix)),
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/* A */ first_csa_ips[0],
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@ -817,8 +817,8 @@ struct BoothPassWorker {
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}
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if (csa_ips.size() > 0) {
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auto c_wire = module->addWire(NEW_ID_SUFFIX(stringf("csa_%d_%d_c", column_ix, csa_ix + 1)), 1);
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auto s_wire = module->addWire(NEW_ID_SUFFIX(stringf("csa_%d_%d_s", column_ix, csa_ix + 1)), 1);
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auto c_wire = module->addWire(NEW_TWINE_SUFFIX(stringf("csa_%d_%d_c", column_ix, csa_ix + 1)), 1);
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auto s_wire = module->addWire(NEW_TWINE_SUFFIX(stringf("csa_%d_%d_s", column_ix, csa_ix + 1)), 1);
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auto csa = module->addFa(NEW_ID_SUFFIX(stringf("csa_%d_%d", column_ix, csa_ix)),
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/* A */ s_result,
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@ -850,10 +850,10 @@ struct BoothPassWorker {
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for (int y_ix = 0; y_ix < (!is_signed ? y_sz : y_sz - 1);) {
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std::string enc_name = stringf("bur_enc_%d", encoder_ix);
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two_int.append(module->addWire(NEW_ID_SUFFIX(stringf("two_int_%d", encoder_ix)), 1));
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one_int.append(module->addWire(NEW_ID_SUFFIX(stringf("one_int_%d", encoder_ix)), 1));
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s_int.append(module->addWire(NEW_ID_SUFFIX(stringf("s_int_%d", encoder_ix)), 1));
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sb_int.append(module->addWire(NEW_ID_SUFFIX(stringf("sb_int_%d", encoder_ix)), 1));
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two_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("two_int_%d", encoder_ix)), 1));
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one_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("one_int_%d", encoder_ix)), 1));
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s_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("s_int_%d", encoder_ix)), 1));
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sb_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("sb_int_%d", encoder_ix)), 1));
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if (y_ix == 0) {
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BuildBur4e(enc_name, State::S0, Y[y_ix],
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@ -910,10 +910,10 @@ struct BoothPassWorker {
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std::string enc_name = stringf("br_enc_pad_%d", encoder_ix);
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two_int.append(module->addWire(NEW_ID_SUFFIX(stringf("two_int_%d", encoder_ix)), 1));
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one_int.append(module->addWire(NEW_ID_SUFFIX(stringf("one_int_%d", encoder_ix)), 1));
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s_int.append(module->addWire(NEW_ID_SUFFIX(stringf("s_int_%d", encoder_ix)), 1));
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sb_int.append(module->addWire(NEW_ID_SUFFIX(stringf("sb_int_%d", encoder_ix)), 1));
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two_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("two_int_%d", encoder_ix)), 1));
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one_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("one_int_%d", encoder_ix)), 1));
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s_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("s_int_%d", encoder_ix)), 1));
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sb_int.append(module->addWire(NEW_TWINE_SUFFIX(stringf("sb_int_%d", encoder_ix)), 1));
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SigBit one_o_int, two_o_int, s_o_int, sb_o_int;
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BuildBur4e(enc_name, Y[y_ix], State::S0,
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@ -957,10 +957,10 @@ struct BoothPassWorker {
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for (unsigned encoder_ix = 1; encoder_ix <= enc_count; encoder_ix++) {
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std::string enc_name = stringf("enc_%d", encoder_ix);
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negi_n_int[encoder_ix - 1] = module->addWire(NEW_ID_SUFFIX(stringf("negi_n_int_%d", encoder_ix)), 1);
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twoi_n_int[encoder_ix - 1] = module->addWire(NEW_ID_SUFFIX(stringf("twoi_n_int_%d", encoder_ix)), 1);
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onei_n_int[encoder_ix - 1] = module->addWire(NEW_ID_SUFFIX(stringf("onei_n_int_%d", encoder_ix)), 1);
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cori_n_int[encoder_ix - 1] = module->addWire(NEW_ID_SUFFIX(stringf("cori_n_int_%d", encoder_ix)), 1);
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negi_n_int[encoder_ix - 1] = module->addWire(NEW_TWINE_SUFFIX(stringf("negi_n_int_%d", encoder_ix)), 1);
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twoi_n_int[encoder_ix - 1] = module->addWire(NEW_TWINE_SUFFIX(stringf("twoi_n_int_%d", encoder_ix)), 1);
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onei_n_int[encoder_ix - 1] = module->addWire(NEW_TWINE_SUFFIX(stringf("onei_n_int_%d", encoder_ix)), 1);
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cori_n_int[encoder_ix - 1] = module->addWire(NEW_TWINE_SUFFIX(stringf("cori_n_int_%d", encoder_ix)), 1);
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if (encoder_ix == 1) {
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BuildBr4e(enc_name, State::S0, Y[0], Y[1],
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@ -995,10 +995,10 @@ struct BoothPassWorker {
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for (int encoder_ix = 1; encoder_ix <= (int)enc_count; encoder_ix++) {
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for (int decoder_ix = 1; decoder_ix <= dec_count; decoder_ix++) {
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PPij[((encoder_ix - 1) * dec_count) + decoder_ix - 1] =
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module->addWire(NEW_ID_SUFFIX(stringf("ppij_%d_%d", encoder_ix, decoder_ix)), 1);
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module->addWire(NEW_TWINE_SUFFIX(stringf("ppij_%d_%d", encoder_ix, decoder_ix)), 1);
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nxj[((encoder_ix - 1) * dec_count) + decoder_ix - 1] =
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module->addWire(NEW_ID_SUFFIX(stringf("nxj_%s%d_%d", decoder_ix == 1 ? "pre_dec_" : "",
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module->addWire(NEW_TWINE_SUFFIX(stringf("nxj_%s%d_%d", decoder_ix == 1 ? "pre_dec_" : "",
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encoder_ix, decoder_ix)), 1);
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}
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}
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@ -1065,8 +1065,8 @@ struct BoothPassWorker {
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std::vector<SigSpec> fa_carry;
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for (fa_row_ix = 0; fa_row_ix < fa_row_count; fa_row_ix++) {
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fa_sum.push_back(module->addWire(NEW_ID_SUFFIX(stringf("fa_sum_%d", fa_row_ix)), fa_count));
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fa_carry.push_back(module->addWire(NEW_ID_SUFFIX(stringf("fa_carry_%d", fa_row_ix)), fa_count));
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fa_sum.push_back(module->addWire(NEW_TWINE_SUFFIX(stringf("fa_sum_%d", fa_row_ix)), fa_count));
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fa_carry.push_back(module->addWire(NEW_TWINE_SUFFIX(stringf("fa_carry_%d", fa_row_ix)), fa_count));
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}
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// full adder creation
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@ -1103,7 +1103,7 @@ struct BoothPassWorker {
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// instantiate the cpa
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SigSpec cpa_carry;
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if (z_sz > fa_row_count * 2)
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cpa_carry = module->addWire(NEW_ID_SUFFIX("cpa_carry"), z_sz - fa_row_count * 2);
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cpa_carry = module->addWire(NEW_TWINE_SUFFIX("cpa_carry"), z_sz - fa_row_count * 2);
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// The end case where we pass the last two summands
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// from prior row directly to product output
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