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This commit is contained in:
Emil J. Tywoniak 2026-06-10 19:22:53 +02:00
parent 015ab4e45b
commit f592f2f3af
203 changed files with 4575 additions and 4481 deletions
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6
passes/techmap/aigmap.cc
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@ -108,7 +108,7 @@ struct AigmapPass : public Pass {
SigBit A = sigs.at(node.left_parent);
SigBit B = sigs.at(node.right_parent);
if (nand_mode && node.inverter) {
bit = module->addWire(NEW_ID);
bit = module->addWire(NEW_TWINE);
auto gate = module->addNandGate(NEW_ID, A, B, bit);
if (select_mode)
new_sel.insert(gate->name);
@ -119,7 +119,7 @@ struct AigmapPass : public Pass {
if (and_cache.count(key))
bit = and_cache.at(key);
else {
bit = module->addWire(NEW_ID);
bit = module->addWire(NEW_TWINE);
auto gate = module->addAndGate(NEW_ID, A, B, bit);
if (select_mode)
new_sel.insert(gate->name);
@ -128,7 +128,7 @@ struct AigmapPass : public Pass {
}
if (node.inverter) {
SigBit new_bit = module->addWire(NEW_ID);
SigBit new_bit = module->addWire(NEW_TWINE);
auto gate = module->addNotGate(NEW_ID, bit, new_bit);
bit = new_bit;
if (select_mode)