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quicklogic: PolarPro 3 support

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Co-authored-by: Grzegorz Latosiński <glatosinski@antmicro.com>
Co-authored-by: Maciej Kurc <mkurc@antmicro.com>
Co-authored-by: Tarachand Pagarani <tpagarani@quicklogic.com>
Co-authored-by: Lalit Sharma <lsharma@quicklogic.com>
Co-authored-by: kkumar23 <kkumar@quicklogic.com>
This commit is contained in:
Lofty 2021-03-17 02:34:30 +00:00 • committed by Marcelina Kościelnicka
parent 8740fdf1d7
commit f4298b057a
20 changed files with 1033 additions and 0 deletions
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39
tests/arch/quicklogic/latches.ys Normal file
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read_verilog ../common/latches.v
design -save read
hierarchy -top latchp
proc
# Can't run any sort of equivalence check because latches are blown to LUTs
synth_quicklogic
cd latchp # Constrain all select calls below inside the top module
select -assert-count 1 t:LUT3
select -assert-count 3 t:inpad
select -assert-count 1 t:outpad
select -assert-none t:LUT3 t:inpad t:outpad %% t:* %D
design -load read
hierarchy -top latchn
proc
# Can't run any sort of equivalence check because latches are blown to LUTs
synth_quicklogic
cd latchn # Constrain all select calls below inside the top module
select -assert-count 1 t:LUT3
select -assert-count 3 t:inpad
select -assert-count 1 t:outpad
select -assert-none t:LUT3 t:inpad t:outpad %% t:* %D
design -load read
hierarchy -top latchsr
proc
# Can't run any sort of equivalence check because latches are blown to LUTs
synth_quicklogic
cd latchsr # Constrain all select calls below inside the top module
select -assert-count 2 t:LUT3
select -assert-count 5 t:inpad
select -assert-count 1 t:outpad
select -assert-none t:LUT3 t:inpad t:outpad %% t:* %D