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test_cell: Add $bweqx, kinda
It fails in sat, and in `ConstEval::eval()`. But it's pseudo supported in test_cell at least. Also fix `RTLIL::Cell::fixup_parameters()` for $bweqx.
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2 changed files with 11 additions and 6 deletions
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@ -429,17 +429,20 @@ static RTLIL::Cell* create_gold_module(RTLIL::Design *design, RTLIL::IdString ce
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cell->setPort(ID::Y, wire);
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}
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if (cell_type == ID($bwmux))
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if (cell_type.in(ID($bwmux), ID($bweqx)))
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{
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int a_size = GetSize(cell->getPort(ID::A));
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wire = module->addWire(ID::B);
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wire->width = a_size;
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wire->port_output = true;
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cell->setPort(ID::B, wire);
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wire = module->addWire(ID::S);
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wire->width = a_size;
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wire->port_output = true;
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cell->setPort(ID::S, wire);
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if (cell_type == ID($bwmux))
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{
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wire = module->addWire(ID::S);
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wire->width = a_size;
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wire->port_output = true;
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cell->setPort(ID::S, wire);
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}
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wire = module->addWire(ID::Y);
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wire->width = a_size;
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wire->port_output = true;
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@ -1112,6 +1115,8 @@ struct TestCellPass : public Pass {
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cell_types[ID($pmux)] = "*";
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if (noeval)
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cell_types[ID($bwmux)] = "A";
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if (nosat && noeval)
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cell_types[ID($bweqx)] = "A";
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cell_types[ID($slice)] = "A";
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cell_types[ID($concat)] = "AB";
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