mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-11-04 13:29:12 +00:00 
			
		
		
		
	Only swap ports if $mul and not $__mul
This commit is contained in:
		
							parent
							
								
									ed4b2834ef
								
							
						
					
					
						commit
						e35dfc5ab5
					
				
					 1 changed files with 1 additions and 1 deletions
				
			
		| 
						 | 
					@ -93,7 +93,7 @@ module _80_mul (A, B, Y);
 | 
				
			||||||
			.Y(Y)
 | 
								.Y(Y)
 | 
				
			||||||
		);
 | 
							);
 | 
				
			||||||
`endif
 | 
					`endif
 | 
				
			||||||
	else if (A_WIDTH < B_WIDTH)
 | 
						else if (_TECHMAP_CELLTYPE_ == "$mul" && A_WIDTH < B_WIDTH)
 | 
				
			||||||
		\$mul #(
 | 
							\$mul #(
 | 
				
			||||||
			.A_SIGNED(B_SIGNED),
 | 
								.A_SIGNED(B_SIGNED),
 | 
				
			||||||
			.B_SIGNED(A_SIGNED),
 | 
								.B_SIGNED(A_SIGNED),
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue