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docs: moving code examples

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Code now resides in `docs/source/code_examples`.
`CHAPTER_Prog` -> `stubnets`
`APPNOTE_011_Design_Investigation` -> `selections` and `show`
`resources/PRESENTATION_Intro` -> `intro`
`resources/PRESENTATION_ExSyn` -> `synth_flow`
`resources/PRESENTATION_ExAdv` -> `techmap`,  `macc`, and `selections`
`resources/PRESENTATION_ExOth` -> `scrambler` and `axis`

Note that generated images are not yet configured to build from the new code locations.
This commit is contained in:
Krystine Sherwin 2023-11-14 12:55:39 +13:00
parent 3d70867809
commit dbc38d72cf
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119 changed files with 264 additions and 905 deletions
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14
docs/source/using_yosys/more_scripting/selections.rst
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@ -103,7 +103,7 @@ processed it simply creates the union of all elements on the stack. So
:yoscrypt:`select t:$add a:foo` will select all ``$add`` cells and all objects
with the ``foo`` attribute set:
.. literalinclude:: /APPNOTE_011_Design_Investigation/foobaraddsub.v
.. literalinclude:: /code_examples/selections/foobaraddsub.v
:caption: Test module for operations on selections
:name: foobaraddsub
:language: verilog
@ -146,7 +146,7 @@ to set the attribute ``sumstuff`` on all cells generated by the first assign
statement. (This works on arbitrary large blocks of Verilog code an can be used
to mark portions of code for analysis.)
.. literalinclude:: /APPNOTE_011_Design_Investigation/sumprod.v
.. literalinclude:: /code_examples/selections/sumprod.v
:caption: Another test module for operations on selections
:name: sumprod
:language: verilog
@ -233,7 +233,7 @@ appended to the ``%ci`` action.
Lets consider :numref:`memdemo_src`. It serves no purpose other than being a
non-trivial circuit for demonstrating some of the advanced Yosys features.
.. literalinclude:: /APPNOTE_011_Design_Investigation/memdemo.v
.. literalinclude:: /code_examples/selections/memdemo.v
:caption: Demo circuit for demonstrating some advanced Yosys features
:name: memdemo_src
:language: verilog
@ -370,13 +370,13 @@ those cases selection variables must be used to capture more complex selections.
Example:
.. literalinclude:: ../../../resources/PRESENTATION_ExAdv/select.v
.. literalinclude:: /code_examples/selections/select.v
:language: verilog
:caption: ``docs/resources/PRESENTATION_ExAdv/select.v``
:caption: ``docs/source/code_examples/selections/select.v``
.. literalinclude:: ../../../resources/PRESENTATION_ExAdv/select.ys
.. literalinclude:: /code_examples/selections/select.ys
:language: yoscrypt
:caption: ``docs/resources/PRESENTATION_ExAdv/select.ys``
:caption: ``docs/source/code_examples/selections/select.ys``
:name: select_ys
.. figure:: /_images/res/PRESENTATION_ExAdv/select.*