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docs: moving code examples

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Code now resides in `docs/source/code_examples`.
`CHAPTER_Prog` -> `stubnets`
`APPNOTE_011_Design_Investigation` -> `selections` and `show`
`resources/PRESENTATION_Intro` -> `intro`
`resources/PRESENTATION_ExSyn` -> `synth_flow`
`resources/PRESENTATION_ExAdv` -> `techmap`,  `macc`, and `selections`
`resources/PRESENTATION_ExOth` -> `scrambler` and `axis`

Note that generated images are not yet configured to build from the new code locations.
This commit is contained in:
Krystine Sherwin 2023-11-14 12:55:39 +13:00
parent 3d70867809
commit dbc38d72cf
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119 changed files with 264 additions and 905 deletions
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27
docs/source/code_examples/intro/counter_outputs.ys Normal file
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# read design
read_verilog counter.v
hierarchy -check -top counter
show -notitle -format dot -prefix counter_00
# the high-level stuff
proc; opt; memory; opt; fsm; opt
show -notitle -format dot -prefix counter_01
# mapping to internal cell library
techmap; opt
splitnets -ports;;
show -notitle -format dot -prefix counter_02
# mapping flip-flops to mycells.lib
dfflibmap -liberty mycells.lib
# mapping logic to mycells.lib
abc -liberty mycells.lib
# cleanup
clean
show -notitle -lib mycells.v -format dot -prefix counter_03