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Fix all comments from PR

This commit is contained in:
SergeyDegtyar 2019-08-21 21:52:07 +03:00
parent b835ec37cb
commit d945b8a357
20 changed files with 465 additions and 160 deletions

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@ -1,4 +1,4 @@
read_verilog mux.v
synth_ice40
equiv_opt -assert -map +/ice40/cells_sim.v synth_ice40
design -load postopt