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https://github.com/YosysHQ/yosys
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Pass the module Subpool to rmunused_module_cells and parallelize that function
This commit is contained in:
Robert O'Callahan
parent
e4dde705dc
commit
c81d7b00da
1 changed files with 222 additions and 97 deletions
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@ -180,16 +180,15 @@ struct RmStats {
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}
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};
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void rmunused_module_cells(Module *module, bool verbose, RmStats &stats, keep_cache_t &keep_cache)
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unsigned int hash_bit(const SigBit &bit) {
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return static_cast<unsigned int>(hash_ops<SigBit>::hash(bit).yield());
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}
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void rmunused_module_cells(Module *module, ParallelDispatchThreadPool::Subpool &subpool, bool verbose, RmStats &stats, keep_cache_t &keep_cache)
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{
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SigMap sigmap(module);
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dict<IdString, pool<Cell*>> mem2cells;
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pool<IdString> mem_unused;
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pool<Cell*> queue, unused;
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pool<SigBit> used_raw_bits;
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dict<SigBit, pool<Cell*>> wire2driver;
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dict<SigBit, vector<string>> driver_driver_logs;
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FfInitVals ffinit(&sigmap, module);
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FfInitVals ffinit;
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ffinit.set_parallel(&sigmap, subpool.thread_pool(), module);
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SigMap raw_sigmap;
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for (auto &it : module->connections_) {
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@ -199,86 +198,209 @@ void rmunused_module_cells(Module *module, bool verbose, RmStats &stats, keep_ca
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}
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}
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for (auto &it : module->memories) {
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mem_unused.insert(it.first);
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}
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struct WireDrivers;
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struct WireDriver {
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using Accumulated = WireDrivers;
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SigBit bit;
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int driver_cell;
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};
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struct WireDrivers {
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WireDrivers() : driver_cell(0) {}
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WireDrivers(WireDriver driver) : bit(driver.bit), driver_cell(driver.driver_cell) {}
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WireDrivers(SigBit bit) : bit(bit), driver_cell(0) {}
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WireDrivers(WireDrivers &&other) = default;
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for (Cell *cell : module->cells()) {
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if (cell->type.in(ID($memwr), ID($memwr_v2), ID($meminit), ID($meminit_v2))) {
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IdString mem_id = cell->getParam(ID::MEMID).decode_string();
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mem2cells[mem_id].insert(cell);
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}
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}
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for (auto &it : module->cells_) {
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Cell *cell = it.second;
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for (auto &it2 : cell->connections()) {
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if (ct_all.cell_known(cell->type) && !ct_all.cell_output(cell->type, it2.first))
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continue;
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for (auto raw_bit : it2.second) {
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if (raw_bit.wire == nullptr)
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continue;
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auto bit = sigmap(raw_bit);
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if (bit.wire == nullptr && ct_all.cell_known(cell->type))
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driver_driver_logs[raw_sigmap(raw_bit)].push_back(stringf("Driver-driver conflict "
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"for %s between cell %s.%s and constant %s in %s: Resolved using constant.",
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log_signal(raw_bit), log_id(cell), log_id(it2.first), log_signal(bit), log_id(module)));
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if (bit.wire != nullptr)
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wire2driver[bit].insert(cell);
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}
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}
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if (keep_cache.query(cell))
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queue.insert(cell);
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else
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unused.insert(cell);
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}
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for (auto &it : module->wires_) {
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Wire *wire = it.second;
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if (wire->port_output || wire->get_bool_attribute(ID::keep)) {
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for (auto bit : sigmap(wire))
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for (auto c : wire2driver[bit])
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queue.insert(c), unused.erase(c);
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for (auto raw_bit : SigSpec(wire))
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used_raw_bits.insert(raw_sigmap(raw_bit));
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}
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}
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while (!queue.empty())
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{
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pool<SigBit> bits;
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pool<IdString> mems;
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for (auto cell : queue) {
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for (auto &it : cell->connections())
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if (!ct_all.cell_known(cell->type) || ct_all.cell_input(cell->type, it.first))
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for (auto bit : sigmap(it.second))
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bits.insert(bit);
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if (cell->type.in(ID($memrd), ID($memrd_v2))) {
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IdString mem_id = cell->getParam(ID::MEMID).decode_string();
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if (mem_unused.count(mem_id)) {
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mem_unused.erase(mem_id);
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mems.insert(mem_id);
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class const_iterator {
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public:
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const_iterator(const WireDrivers &drivers, bool end)
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: driver_cell(drivers.driver_cell), in_extra_cells(end) {
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if (drivers.extra_driver_cells) {
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if (end) {
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extra_it = drivers.extra_driver_cells->end();
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} else {
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extra_it = drivers.extra_driver_cells->begin();
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}
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}
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}
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int operator*() const {
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if (in_extra_cells)
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return **extra_it;
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return driver_cell;
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}
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const_iterator& operator++() {
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if (in_extra_cells)
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++*extra_it;
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else
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in_extra_cells = true;
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return *this;
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}
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bool operator!=(const const_iterator &other) const {
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return !(*this == other);
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}
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bool operator==(const const_iterator &other) const {
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return in_extra_cells == other.in_extra_cells &&
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extra_it == other.extra_it;
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}
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private:
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std::optional<pool<int>::iterator> extra_it;
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int driver_cell;
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bool in_extra_cells;
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};
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const_iterator begin() const { return const_iterator(*this, false); }
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const_iterator end() const { return const_iterator(*this, true); }
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SigBit bit;
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int driver_cell;
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std::unique_ptr<pool<int>> extra_driver_cells;
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};
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struct WireDriversKeyEquality {
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bool operator()(const WireDrivers &a, const WireDrivers &b) const {
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return a.bit == b.bit;
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}
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};
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struct WireDriversCollisionHandler {
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void operator()(WireDrivers &incumbent, WireDrivers &new_value) const {
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log_assert(new_value.extra_driver_cells == nullptr);
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if (!incumbent.extra_driver_cells)
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incumbent.extra_driver_cells.reset(new pool<int>());
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incumbent.extra_driver_cells->insert(new_value.driver_cell);
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}
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};
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using Wire2Drivers = ShardedHashSet<WireDriver, WireDriversKeyEquality, WireDriversCollisionHandler>;
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queue.clear();
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Wire2Drivers::Builder wire2driver_builder(subpool);
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ShardedVector<std::pair<std::string, int>> mem2cells_vector(subpool);
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ShardedVector<std::pair<SigBit, std::string>> driver_driver_logs(subpool);
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ShardedVector<Wire*> keep_wires(subpool);
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const RTLIL::Module *const_module = module;
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int num_threads = subpool.num_threads();
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ConcurrentWorkQueue<int> cell_queue(num_threads);
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std::vector<std::atomic<bool>> unused(const_module->cells_size());
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subpool.run([&sigmap, &raw_sigmap, &keep_cache, const_module, &mem2cells_vector, &driver_driver_logs, &keep_wires, &cell_queue, &wire2driver_builder, &unused](const ParallelDispatchThreadPool::RunCtx &ctx) {
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for (int i : ctx.item_range(const_module->cells_size())) {
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Cell *cell = const_module->cell_at(i);
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if (cell->type.in(ID($memwr), ID($memwr_v2), ID($meminit), ID($meminit_v2)))
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mem2cells_vector.insert(ctx, {cell->getParam(ID::MEMID).decode_string(), i});
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for (auto bit : bits)
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for (auto c : wire2driver[bit])
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if (unused.count(c))
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queue.insert(c), unused.erase(c);
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for (auto &it2 : cell->connections()) {
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if (ct_all.cell_known(cell->type) && !ct_all.cell_output(cell->type, it2.first))
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continue;
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for (auto raw_bit : it2.second) {
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if (raw_bit.wire == nullptr)
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continue;
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auto bit = sigmap(raw_bit);
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if (bit.wire == nullptr && ct_all.cell_known(cell->type)) {
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std::string msg = stringf("Driver-driver conflict "
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"for %s between cell %s.%s and constant %s in %s: Resolved using constant.",
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log_signal(raw_bit), cell->name.unescape(), it2.first.unescape(), log_signal(bit), const_module->name.unescape());
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driver_driver_logs.insert(ctx, {raw_sigmap(raw_bit), msg});
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}
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if (bit.wire != nullptr)
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wire2driver_builder.insert(ctx, {{bit, i}, hash_bit(bit)});
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}
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}
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bool keep = keep_cache.query(cell);
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unused[i].store(!keep, std::memory_order_relaxed);
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if (keep)
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cell_queue.push(ctx, i);
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}
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for (int i : ctx.item_range(const_module->wires_size())) {
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Wire *wire = const_module->wire_at(i);
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if (wire->port_output || wire->get_bool_attribute(ID::keep))
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keep_wires.insert(ctx, wire);
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}
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});
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subpool.run([&wire2driver_builder](const ParallelDispatchThreadPool::RunCtx &ctx) {
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wire2driver_builder.process(ctx);
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});
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Wire2Drivers wire2driver(wire2driver_builder);
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for (auto mem : mems)
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for (auto c : mem2cells[mem])
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if (unused.count(c))
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queue.insert(c), unused.erase(c);
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dict<std::string, pool<int>> mem2cells;
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for (std::pair<std::string, int> &mem2cell : mem2cells_vector)
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mem2cells[mem2cell.first].insert(mem2cell.second);
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pool<SigBit> used_raw_bits;
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int i = 0;
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for (Wire *wire : keep_wires) {
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for (auto bit : sigmap(wire)) {
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const WireDrivers *drivers = wire2driver.find({{bit}, hash_bit(bit)});
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if (drivers != nullptr)
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for (int cell_index : *drivers)
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if (unused[cell_index].exchange(false, std::memory_order_relaxed)) {
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ThreadIndex fake_thread_index = {i++ % num_threads};
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cell_queue.push(fake_thread_index, cell_index);
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}
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}
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for (auto raw_bit : SigSpec(wire))
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used_raw_bits.insert(raw_sigmap(raw_bit));
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}
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unused.sort(RTLIL::sort_by_name_id<RTLIL::Cell>());
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std::vector<std::atomic<bool>> mem_unused(module->memories.size());
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dict<std::string, int> mem_indices;
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for (int i = 0; i < GetSize(module->memories); ++i) {
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mem_indices[module->memories.element(i)->first.str()] = i;
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mem_unused[i].store(true, std::memory_order_relaxed);
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}
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for (auto cell : unused) {
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subpool.run([const_module, &sigmap, &wire2driver, &mem2cells, &unused, &cell_queue, &mem_indices, &mem_unused](const ParallelDispatchThreadPool::RunCtx &ctx) {
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pool<SigBit> bits;
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pool<std::string> mems;
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while (true) {
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std::vector<int> cell_indices = cell_queue.pop_batch(ctx);
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if (cell_indices.empty())
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return;
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for (auto cell_index : cell_indices) {
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Cell *cell = const_module->cell_at(cell_index);
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for (auto &it : cell->connections())
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if (!ct_all.cell_known(cell->type) || ct_all.cell_input(cell->type, it.first))
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for (auto bit : sigmap(it.second))
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bits.insert(bit);
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if (cell->type.in(ID($memrd), ID($memrd_v2))) {
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std::string mem_id = cell->getParam(ID::MEMID).decode_string();
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if (mem_indices.count(mem_id)) {
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int mem_index = mem_indices[mem_id];
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if (mem_unused[mem_index].exchange(false, std::memory_order_relaxed))
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mems.insert(mem_id);
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}
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}
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}
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for (auto bit : bits) {
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const WireDrivers *drivers = wire2driver.find({{bit}, hash_bit(bit)});
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if (drivers != nullptr)
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for (int cell_index : *drivers)
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if (unused[cell_index].exchange(false, std::memory_order_relaxed))
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cell_queue.push(ctx, cell_index);
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}
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bits.clear();
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for (auto mem : mems) {
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if (mem2cells.count(mem) == 0)
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continue;
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for (int cell_index : mem2cells.at(mem))
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if (unused[cell_index].exchange(false, std::memory_order_relaxed))
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cell_queue.push(ctx, cell_index);
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}
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mems.clear();
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}
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});
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ShardedVector<int> sharded_unused_cells(subpool);
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subpool.run([const_module, &unused, &sharded_unused_cells, &wire2driver](const ParallelDispatchThreadPool::RunCtx &ctx) {
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// Parallel destruction of `wire2driver`
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wire2driver.clear(ctx);
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for (int i : ctx.item_range(const_module->cells_size()))
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if (unused[i].load(std::memory_order_relaxed))
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sharded_unused_cells.insert(ctx, i);
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});
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pool<Cell*> unused_cells;
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for (int cell_index : sharded_unused_cells)
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unused_cells.insert(const_module->cell_at(cell_index));
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unused_cells.sort(RTLIL::sort_by_name_id<RTLIL::Cell>());
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for (auto cell : unused_cells) {
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if (verbose)
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log_debug(" removing unused `%s' cell `%s'.\n", cell->type, cell->name);
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module->design->scratchpad_set_bool("opt.did_something", true);
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@ -288,28 +410,31 @@ void rmunused_module_cells(Module *module, bool verbose, RmStats &stats, keep_ca
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stats.count_rm_cells++;
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}
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for (auto it : mem_unused)
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{
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for (const auto &it : mem_indices) {
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if (!mem_unused[it.second].load(std::memory_order_relaxed))
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continue;
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RTLIL::IdString id(it.first);
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if (verbose)
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log_debug(" removing unused memory `%s'.\n", it);
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delete module->memories.at(it);
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module->memories.erase(it);
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log_debug(" removing unused memory `%s'.\n", id.unescape());
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delete module->memories.at(id);
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module->memories.erase(id);
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}
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for (auto &it : module->cells_) {
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Cell *cell = it.second;
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for (auto &it2 : cell->connections()) {
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if (ct_all.cell_known(cell->type) && !ct_all.cell_input(cell->type, it2.first))
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continue;
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for (auto raw_bit : raw_sigmap(it2.second))
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used_raw_bits.insert(raw_bit);
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if (!driver_driver_logs.empty()) {
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// We could do this in parallel but hopefully this is rare.
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for (auto &it : module->cells_) {
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Cell *cell = it.second;
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for (auto &it2 : cell->connections()) {
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if (ct_all.cell_known(cell->type) && !ct_all.cell_input(cell->type, it2.first))
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continue;
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for (auto raw_bit : raw_sigmap(it2.second))
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used_raw_bits.insert(raw_bit);
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}
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}
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for (std::pair<SigBit, std::string> &it : driver_driver_logs) {
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if (used_raw_bits.count(it.first))
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log_warning("%s\n", it.second);
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}
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}
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for (auto it : driver_driver_logs) {
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if (used_raw_bits.count(it.first))
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for (auto msg : it.second)
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log_warning("%s\n", msg);
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}
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}
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@ -760,7 +885,7 @@ void rmunused_module(RTLIL::Module *module, ParallelDispatchThreadPool &thread_p
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int num_worker_threads = ThreadPool::work_pool_size(0, module->cells_size(), 1000);
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ParallelDispatchThreadPool::Subpool subpool(thread_pool, num_worker_threads);
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remove_temporary_cells(module, subpool, verbose);
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rmunused_module_cells(module, verbose, stats, keep_cache);
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rmunused_module_cells(module, subpool, verbose, stats, keep_cache);
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while (rmunused_module_signals(module, purge_mode, verbose, stats)) { }
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if (rminit && rmunused_module_init(module, subpool, verbose))
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