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Make Module stop accessing internals of SigSpec

This commit is contained in:
Robert O'Callahan 2025-10-27 12:41:50 +00:00
parent c9a4c608ce
commit c4f3e61339
2 changed files with 17 additions and 14 deletions

View file

@ -1251,10 +1251,6 @@ private:
unpack();
}
// Only used by Module::remove(const pool<Wire*> &wires)
// but cannot be more specific as it isn't yet declared
friend struct RTLIL::Module;
public:
SigSpec() : width_(0), hash_(0) {}
SigSpec(std::initializer_list<RTLIL::SigSpec> parts);
@ -1326,6 +1322,8 @@ public:
RTLIL::SigSpec extract(int offset, int length = 1) const;
RTLIL::SigSpec extract_end(int offset) const { return extract(offset, width_ - offset); }
void rewrite_wires(std::function<void(RTLIL::Wire*& wire)> rewrite);
RTLIL::SigBit lsb() const { log_assert(width_); return (*this)[0]; };
RTLIL::SigBit msb() const { log_assert(width_); return (*this)[width_ - 1]; };