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https://github.com/YosysHQ/yosys
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WIP
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parent
afdae7b87e
commit
c3ffbf6fae
229 changed files with 3902 additions and 3835 deletions
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@ -277,7 +277,7 @@ struct BufnormPass : public Pass {
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vector<Cell*> old_dup_buffers;
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for (auto cell : module->cells())
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{
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if (!cell->type.in(ID($buf), ID($_BUF_)))
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if (!cell->type.in(TW($buf), TW($_BUF_)))
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continue;
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SigSpec insig = cell->getPort(TW::A);
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@ -380,7 +380,7 @@ struct BufnormPass : public Pass {
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for (auto cell : module->cells())
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{
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if (cell->type.in(ID($buf), ID($_BUF_)))
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if (cell->type.in(TW($buf), TW($_BUF_)))
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continue;
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for (auto &conn : cell->connections())
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@ -409,7 +409,7 @@ struct BufnormPass : public Pass {
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if (w->name.isPublic())
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log(" directly driven by cell %s port %s: %s\n",
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cell, conn.first.unescape(), w);
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cell, design->twines.unescaped_str(conn.first), w);
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for (auto bit : SigSpec(w))
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mapped_bits[sigmap(bit)] = bit;
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@ -488,12 +488,12 @@ struct BufnormPass : public Pass {
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}
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} else {
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if (bits_mode) {
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IdString celltype = pos_mode ? ID($pos) : buf_mode ? ID($buf) : ID($_BUF_);
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IdString celltype = pos_mode ? TW($pos) : buf_mode ? TW($buf) : TW($_BUF_);
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for (int i = 0; i < GetSize(insig) && i < GetSize(outsig); i++)
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make_buffer_f(celltype, insig[i], outsig[i]);
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} else {
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IdString celltype = pos_mode ? ID($pos) : buf_mode ? ID($buf) :
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GetSize(outsig) == 1 ? ID($_BUF_) : ID($buf);
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IdString celltype = pos_mode ? TW($pos) : buf_mode ? TW($buf) :
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GetSize(outsig) == 1 ? TW($_BUF_) : TW($buf);
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make_buffer_f(celltype, insig, outsig);
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}
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}
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@ -519,7 +519,7 @@ struct BufnormPass : public Pass {
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if (conn.second != newsig) {
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log(" fixing input signal on cell %s port %s: %s\n",
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cell, conn.first.unescape(), log_signal(newsig));
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cell, design->twines.unescaped_str(conn.first), log_signal(newsig));
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cell->setPort(conn.first, newsig);
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count_updated_cellports++;
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}
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