mirror of
https://github.com/YosysHQ/yosys
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WIP
This commit is contained in:
Emil J. Tywoniak
parent
afdae7b87e
commit
c3ffbf6fae
229 changed files with 3902 additions and 3835 deletions
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@ -227,7 +227,7 @@ struct SmvWorker
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{
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// FIXME: $slice, $concat, $mem
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if (cell->type.in(ID($assert)))
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if (cell->type.in(TW($assert)))
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{
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SigSpec sig_a = cell->getPort(TW::A);
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SigSpec sig_en = cell->getPort(TW::EN);
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@ -237,7 +237,7 @@ struct SmvWorker
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continue;
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}
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if (cell->type.in(ID($shl), ID($shr), ID($sshl), ID($sshr), ID($shift), ID($shiftx)))
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if (cell->type.in(TW($shl), TW($shr), TW($sshl), TW($sshr), TW($shift), TW($shiftx)))
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{
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SigSpec sig_a = cell->getPort(TW::A);
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SigSpec sig_b = cell->getPort(TW::B);
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@ -256,10 +256,10 @@ struct SmvWorker
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bool signed_a = cell->getParam(ID::A_SIGNED).as_bool();
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bool signed_b = cell->getParam(ID::B_SIGNED).as_bool();
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string op = cell->type.in(ID($shl), ID($sshl)) ? "<<" : ">>";
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string op = cell->type.in(TW($shl), TW($sshl)) ? "<<" : ">>";
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string expr, expr_a;
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if (cell->type == ID($sshr) && signed_a)
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if (cell->type == TW($sshr) && signed_a)
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{
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expr_a = rvalue_s(sig_a, width);
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expr = stringf("resize(unsigned(%s %s %s), %d)", expr_a, op, rvalue(sig_b.extract(0, shift_b_width)), width_y);
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@ -268,7 +268,7 @@ struct SmvWorker
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rvalue(sig_b.extract(shift_b_width, GetSize(sig_b) - shift_b_width)), GetSize(sig_b) - shift_b_width,
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rvalue(sig_a[GetSize(sig_a)-1]), width_y, width_y, expr.c_str());
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}
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else if (cell->type.in(ID($shift), ID($shiftx)) && signed_b)
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else if (cell->type.in(TW($shift), TW($shiftx)) && signed_b)
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{
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expr_a = rvalue_u(sig_a, width);
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@ -292,7 +292,7 @@ struct SmvWorker
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}
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else
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{
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if (cell->type.in(ID($shift), ID($shiftx)) || !signed_a)
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if (cell->type.in(TW($shift), TW($shiftx)) || !signed_a)
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expr_a = rvalue_u(sig_a, width);
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else
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expr_a = stringf("resize(unsigned(%s), %d)", rvalue_s(sig_a, width_ay), width);
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@ -308,14 +308,14 @@ struct SmvWorker
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continue;
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}
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if (cell->type.in(ID($not), ID($pos), ID($neg)))
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if (cell->type.in(TW($not), TW($pos), TW($neg)))
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{
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int width = GetSize(cell->getPort(TW::Y));
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string expr_a, op;
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if (cell->type == ID($not)) op = "!";
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if (cell->type == ID($pos)) op = "";
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if (cell->type == ID($neg)) op = "-";
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if (cell->type == TW($not)) op = "!";
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if (cell->type == TW($pos)) op = "";
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if (cell->type == TW($neg)) op = "-";
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if (cell->getParam(ID::A_SIGNED).as_bool())
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{
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@ -331,18 +331,18 @@ struct SmvWorker
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continue;
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}
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if (cell->type.in(ID($add), ID($sub), ID($mul), ID($and), ID($or), ID($xor), ID($xnor)))
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if (cell->type.in(TW($add), TW($sub), TW($mul), TW($and), TW($or), TW($xor), TW($xnor)))
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{
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int width = GetSize(cell->getPort(TW::Y));
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string expr_a, expr_b, op;
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if (cell->type == ID($add)) op = "+";
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if (cell->type == ID($sub)) op = "-";
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if (cell->type == ID($mul)) op = "*";
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if (cell->type == ID($and)) op = "&";
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if (cell->type == ID($or)) op = "|";
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if (cell->type == ID($xor)) op = "xor";
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if (cell->type == ID($xnor)) op = "xnor";
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if (cell->type == TW($add)) op = "+";
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if (cell->type == TW($sub)) op = "-";
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if (cell->type == TW($mul)) op = "*";
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if (cell->type == TW($and)) op = "&";
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if (cell->type == TW($or)) op = "|";
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if (cell->type == TW($xor)) op = "xor";
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if (cell->type == TW($xnor)) op = "xnor";
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if (cell->getParam(ID::A_SIGNED).as_bool())
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{
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@ -359,15 +359,15 @@ struct SmvWorker
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}
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// SMV has a "mod" operator, but its semantics don't seem to be well-defined - to be safe, don't generate it at all
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if (cell->type.in(ID($div)/*, ID($mod), ID($modfloor)*/))
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if (cell->type.in(TW($div)/*, TW($mod), TW($modfloor)*/))
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{
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int width_y = GetSize(cell->getPort(TW::Y));
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int width = max(width_y, GetSize(cell->getPort(TW::A)));
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width = max(width, GetSize(cell->getPort(TW::B)));
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string expr_a, expr_b, op;
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if (cell->type == ID($div)) op = "/";
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//if (cell->type == ID($mod)) op = "mod";
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if (cell->type == TW($div)) op = "/";
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//if (cell->type == TW($mod)) op = "mod";
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if (cell->getParam(ID::A_SIGNED).as_bool())
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{
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@ -383,19 +383,19 @@ struct SmvWorker
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continue;
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}
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if (cell->type.in(ID($eq), ID($ne), ID($eqx), ID($nex), ID($lt), ID($le), ID($ge), ID($gt)))
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if (cell->type.in(TW($eq), TW($ne), TW($eqx), TW($nex), TW($lt), TW($le), TW($ge), TW($gt)))
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{
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int width = max(GetSize(cell->getPort(TW::A)), GetSize(cell->getPort(TW::B)));
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string expr_a, expr_b, op;
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if (cell->type == ID($eq)) op = "=";
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if (cell->type == ID($ne)) op = "!=";
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if (cell->type == ID($eqx)) op = "=";
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if (cell->type == ID($nex)) op = "!=";
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if (cell->type == ID($lt)) op = "<";
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if (cell->type == ID($le)) op = "<=";
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if (cell->type == ID($ge)) op = ">=";
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if (cell->type == ID($gt)) op = ">";
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if (cell->type == TW($eq)) op = "=";
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if (cell->type == TW($ne)) op = "!=";
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if (cell->type == TW($eqx)) op = "=";
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if (cell->type == TW($nex)) op = "!=";
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if (cell->type == TW($lt)) op = "<";
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if (cell->type == TW($le)) op = "<=";
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if (cell->type == TW($ge)) op = ">=";
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if (cell->type == TW($gt)) op = ">";
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if (cell->getParam(ID::A_SIGNED).as_bool())
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{
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@ -414,7 +414,7 @@ struct SmvWorker
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continue;
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}
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if (cell->type.in(ID($reduce_and), ID($reduce_or), ID($reduce_bool)))
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if (cell->type.in(TW($reduce_and), TW($reduce_or), TW($reduce_bool)))
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{
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int width_a = GetSize(cell->getPort(TW::A));
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int width_y = GetSize(cell->getPort(TW::Y));
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@ -422,15 +422,15 @@ struct SmvWorker
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const char *expr_y = lvalue(cell->getPort(TW::Y));
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string expr;
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if (cell->type == ID($reduce_and)) expr = stringf("%s = !0ub%d_0", expr_a, width_a);
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if (cell->type == ID($reduce_or)) expr = stringf("%s != 0ub%d_0", expr_a, width_a);
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if (cell->type == ID($reduce_bool)) expr = stringf("%s != 0ub%d_0", expr_a, width_a);
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if (cell->type == TW($reduce_and)) expr = stringf("%s = !0ub%d_0", expr_a, width_a);
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if (cell->type == TW($reduce_or)) expr = stringf("%s != 0ub%d_0", expr_a, width_a);
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if (cell->type == TW($reduce_bool)) expr = stringf("%s != 0ub%d_0", expr_a, width_a);
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definitions.push_back(stringf("%s := resize(word1(%s), %d);", expr_y, expr, width_y));
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continue;
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}
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if (cell->type.in(ID($reduce_xor), ID($reduce_xnor)))
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if (cell->type.in(TW($reduce_xor), TW($reduce_xnor)))
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{
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int width_y = GetSize(cell->getPort(TW::Y));
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const char *expr_y = lvalue(cell->getPort(TW::Y));
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@ -442,14 +442,14 @@ struct SmvWorker
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expr += rvalue(bit);
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}
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if (cell->type == ID($reduce_xnor))
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if (cell->type == TW($reduce_xnor))
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expr = "!(" + expr + ")";
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definitions.push_back(stringf("%s := resize(%s, %d);", expr_y, expr, width_y));
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continue;
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}
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if (cell->type.in(ID($logic_and), ID($logic_or)))
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if (cell->type.in(TW($logic_and), TW($logic_or)))
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{
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int width_a = GetSize(cell->getPort(TW::A));
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int width_b = GetSize(cell->getPort(TW::B));
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@ -460,14 +460,14 @@ struct SmvWorker
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const char *expr_y = lvalue(cell->getPort(TW::Y));
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string expr;
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if (cell->type == ID($logic_and)) expr = expr_a + " & " + expr_b;
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if (cell->type == ID($logic_or)) expr = expr_a + " | " + expr_b;
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if (cell->type == TW($logic_and)) expr = expr_a + " & " + expr_b;
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if (cell->type == TW($logic_or)) expr = expr_a + " | " + expr_b;
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definitions.push_back(stringf("%s := resize(word1(%s), %d);", expr_y, expr, width_y));
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continue;
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}
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if (cell->type.in(ID($logic_not)))
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if (cell->type.in(TW($logic_not)))
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{
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int width_a = GetSize(cell->getPort(TW::A));
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int width_y = GetSize(cell->getPort(TW::Y));
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@ -479,7 +479,7 @@ struct SmvWorker
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continue;
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}
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if (cell->type.in(ID($mux), ID($pmux)))
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if (cell->type.in(TW($mux), TW($pmux)))
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{
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int width = GetSize(cell->getPort(TW::Y));
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SigSpec sig_a = cell->getPort(TW::A);
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@ -495,34 +495,34 @@ struct SmvWorker
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continue;
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}
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if (cell->type == ID($dff))
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if (cell->type == TW($dff))
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{
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vars.push_back(stringf("%s : unsigned word[%d]; -- %s", lvalue(cell->getPort(TW::Q)), GetSize(cell->getPort(TW::Q)), log_signal(cell->getPort(TW::Q))));
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assignments.push_back(stringf("next(%s) := %s;", lvalue(cell->getPort(TW::Q)), rvalue(cell->getPort(TW::D))));
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continue;
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}
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if (cell->type.in(ID($_BUF_), ID($_NOT_)))
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if (cell->type.in(TW($_BUF_), TW($_NOT_)))
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{
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string op = cell->type == ID($_NOT_) ? "!" : "";
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string op = cell->type == TW($_NOT_) ? "!" : "";
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definitions.push_back(stringf("%s := %s%s;", lvalue(cell->getPort(TW::Y)), op, rvalue(cell->getPort(TW::A))));
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continue;
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}
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if (cell->type.in(ID($_AND_), ID($_NAND_), ID($_OR_), ID($_NOR_), ID($_XOR_), ID($_XNOR_), ID($_ANDNOT_), ID($_ORNOT_)))
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if (cell->type.in(TW($_AND_), TW($_NAND_), TW($_OR_), TW($_NOR_), TW($_XOR_), TW($_XNOR_), TW($_ANDNOT_), TW($_ORNOT_)))
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{
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string op;
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if (cell->type.in(ID($_AND_), ID($_NAND_), ID($_ANDNOT_))) op = "&";
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if (cell->type.in(ID($_OR_), ID($_NOR_), ID($_ORNOT_))) op = "|";
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if (cell->type.in(ID($_XOR_))) op = "xor";
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if (cell->type.in(ID($_XNOR_))) op = "xnor";
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if (cell->type.in(TW($_AND_), TW($_NAND_), TW($_ANDNOT_))) op = "&";
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if (cell->type.in(TW($_OR_), TW($_NOR_), TW($_ORNOT_))) op = "|";
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if (cell->type.in(TW($_XOR_))) op = "xor";
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if (cell->type.in(TW($_XNOR_))) op = "xnor";
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if (cell->type.in(ID($_ANDNOT_), ID($_ORNOT_)))
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if (cell->type.in(TW($_ANDNOT_), TW($_ORNOT_)))
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definitions.push_back(stringf("%s := %s %s (!%s);", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::A)), op.c_str(), rvalue(cell->getPort(TW::B))));
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else
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if (cell->type.in(ID($_NAND_), ID($_NOR_)))
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if (cell->type.in(TW($_NAND_), TW($_NOR_)))
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definitions.push_back(stringf("%s := !(%s %s %s);", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::A)), op.c_str(), rvalue(cell->getPort(TW::B))));
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else
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@ -531,61 +531,61 @@ struct SmvWorker
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continue;
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}
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if (cell->type == ID($_MUX_))
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if (cell->type == TW($_MUX_))
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{
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definitions.push_back(stringf("%s := bool(%s) ? %s : %s;", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::S)), rvalue(cell->getPort(TW::B)), rvalue(cell->getPort(TW::A))));
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continue;
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}
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if (cell->type == ID($_NMUX_))
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if (cell->type == TW($_NMUX_))
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{
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definitions.push_back(stringf("%s := !(bool(%s) ? %s : %s);", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::S)), rvalue(cell->getPort(TW::B)), rvalue(cell->getPort(TW::A))));
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continue;
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}
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if (cell->type == ID($_AOI3_))
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if (cell->type == TW($_AOI3_))
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{
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definitions.push_back(stringf("%s := !((%s & %s) | %s);", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::A)), rvalue(cell->getPort(TW::B)), rvalue(cell->getPort(TW::C))));
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continue;
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}
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if (cell->type == ID($_OAI3_))
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if (cell->type == TW($_OAI3_))
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{
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definitions.push_back(stringf("%s := !((%s | %s) & %s);", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::A)), rvalue(cell->getPort(TW::B)), rvalue(cell->getPort(TW::C))));
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continue;
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}
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if (cell->type == ID($_AOI4_))
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if (cell->type == TW($_AOI4_))
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{
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definitions.push_back(stringf("%s := !((%s & %s) | (%s & %s));", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::A)), rvalue(cell->getPort(TW::B)), rvalue(cell->getPort(TW::C)), rvalue(cell->getPort(TW::D))));
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continue;
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}
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if (cell->type == ID($_OAI4_))
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if (cell->type == TW($_OAI4_))
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{
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definitions.push_back(stringf("%s := !((%s | %s) & (%s | %s));", lvalue(cell->getPort(TW::Y)),
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rvalue(cell->getPort(TW::A)), rvalue(cell->getPort(TW::B)), rvalue(cell->getPort(TW::C)), rvalue(cell->getPort(TW::D))));
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continue;
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}
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if (cell->type == ID($scopeinfo))
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if (cell->type == TW($scopeinfo))
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continue;
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if (cell->type[0] == '$') {
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if (cell->type.in(ID($dffe), ID($sdff), ID($sdffe), ID($sdffce)) || cell->type.str().substr(0, 6) == "$_SDFF" || (cell->type.str().substr(0, 6) == "$_DFFE" && cell->type.str().size() == 10)) {
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if (cell->type.in(TW($dffe), TW($sdff), TW($sdffe), TW($sdffce)) || cell->type.str().substr(0, 6) == "$_SDFF" || (cell->type.str().substr(0, 6) == "$_DFFE" && cell->type.str().size() == 10)) {
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log_error("Unsupported cell type %s for cell %s.%s -- please run `dffunmap` before `write_smv`.\n",
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cell->type.unescape(), module, cell);
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}
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if (cell->type.in(ID($adff), ID($adffe), ID($aldff), ID($aldffe), ID($dffsr), ID($dffsre)) || cell->type.str().substr(0, 5) == "$_DFF" || cell->type.str().substr(0, 7) == "$_ALDFF") {
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if (cell->type.in(TW($adff), TW($adffe), TW($aldff), TW($aldffe), TW($dffsr), TW($dffsre)) || cell->type.str().substr(0, 5) == "$_DFF" || cell->type.str().substr(0, 7) == "$_ALDFF") {
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log_error("Unsupported cell type %s for cell %s.%s -- please run `async2sync; dffunmap` or `clk2fflogic` before `write_smv`.\n",
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cell->type.unescape(), module, cell);
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}
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if (cell->type.in(ID($sr), ID($dlatch), ID($adlatch), ID($dlatchsr)) || cell->type.str().substr(0, 8) == "$_DLATCH" || cell->type.str().substr(0, 5) == "$_SR_") {
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if (cell->type.in(TW($sr), TW($dlatch), TW($adlatch), TW($dlatchsr)) || cell->type.str().substr(0, 8) == "$_DLATCH" || cell->type.str().substr(0, 5) == "$_SR_") {
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log_error("Unsupported cell type %s for cell %s.%s -- please run `clk2fflogic` before `write_smv`.\n",
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cell->type.unescape(), module, cell);
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}
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