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This commit is contained in:
Emil J. Tywoniak 2026-05-29 11:59:27 +02:00
parent dab9a386cc
commit c3457e2e5c
35 changed files with 204 additions and 63 deletions
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2
passes/cmds/abstract.cc
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@ -265,7 +265,7 @@ unsigned int abstract_value(Module* mod, EnableLogic enable, const std::vector<S
unsigned int changed = 0;
std::vector<Cell*> cells_snapshot = mod->cells();
for (auto cell : cells_snapshot) {
if (cell->type == ID($input_port))
if (cell->type.in(ID($input_port), ID($output_port), ID($public)))
continue;
for (auto conn : cell->connections())
if (cell->output(conn.first)) {

2
passes/cmds/check.cc
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@ -358,7 +358,7 @@ struct CheckPass : public Pass {
pool<Cell *> coarsened_cells;
for (auto cell : module->cells())
{
if (cell->type == ID($input_port))
if (cell->type.in(ID($input_port), ID($output_port), ID($public)))
continue;
if (mapped && cell->type.begins_with("$") && design->module(cell->type) == nullptr) {

2
passes/cmds/portarcs.cc
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@ -125,7 +125,7 @@ struct PortarcsPass : Pass {
for (auto cell : m->cells())
// Ignore all bufnorm helper cells
if (!cell->type.in(ID($buf), ID($input_port), ID($connect), ID($tribuf))) {
if (!cell->type.in(ID($buf), ID($input_port), ID($output_port), ID($public), ID($connect), ID($tribuf))) {
auto tdata = tinfo.find(cell->type);
if (tdata == tinfo.end())
log_cmd_error("Missing timing data for module '%s'.\n", cell->type.unescape());