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anlogic: support BRAM mapping

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Anlogic FPGAs all have two kinds of BRAMs, one is 9bit*1K when being
true dual port (or 18bit*512 when simple dual port), the other is
16bit*2K.

Supports mapping of these two kinds of BRAMs. 9Kbit BRAM in SDP mode and
32Kbit BRAM with 8bit width are not support yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
This commit is contained in:
Icenowy Zheng 2021-12-17 20:25:32 +08:00
parent 60c3ea367c
commit c2b7ad3b28
8 changed files with 283 additions and 2 deletions
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45
techlibs/anlogic/brams.txt Normal file
View file

@ -0,0 +1,45 @@
bram $__ANLOGIC_BRAM9K_TDP
init 1
abits 13 @a13d1
dbits 1 @a13d1
abits 12 @a12d2
dbits 2 @a12d2
abits 11 @a11d4
dbits 4 @a11d4
abits 10 @a10d8
dbits 8 @a10d8
abits 10 @a10d9
dbits 9 @a10d9
groups 2
ports 1 1
wrmode 0 1
enable 1 1
transp 2 0
clocks 2 3
clkpol 2 3
endbram
bram $__ANLOGIC_BRAM32K
init 1
abits 11
dbits 16
groups 2
ports 1 1
wrmode 0 1
enable 1 2
transp 0 0
clocks 2 3
clkpol 2 3
endbram
match $__ANLOGIC_BRAM32K
min efficiency 30
shuffle_enable B
make_transp
or_next_if_better
endmatch
match $__ANLOGIC_BRAM9K_TDP
min efficiency 5
make_transp
endmatch