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anlogic: support BRAM mapping

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Anlogic FPGAs all have two kinds of BRAMs, one is 9bit*1K when being
true dual port (or 18bit*512 when simple dual port), the other is
16bit*2K.

Supports mapping of these two kinds of BRAMs. 9Kbit BRAM in SDP mode and
32Kbit BRAM with 8bit width are not support yet.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
This commit is contained in:
Icenowy Zheng 2021-12-17 20:25:32 +08:00
parent 60c3ea367c
commit c2b7ad3b28
8 changed files with 283 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

22
techlibs/anlogic/Makefile.inc
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@ -3,6 +3,22 @@ OBJS += techlibs/anlogic/synth_anlogic.o
OBJS += techlibs/anlogic/anlogic_eqn.o
OBJS += techlibs/anlogic/anlogic_fixcarry.o
GENFILES += techlibs/anlogic/brams_init_16.vh
GENFILES += techlibs/anlogic/brams_init_9.vh
GENFILES += techlibs/anlogic/brams_init_8.vh
EXTRA_OBJS += techlibs/anlogic/brams_init.mk
.SECONDARY: techlibs/anlogic/brams_init.mk
techlibs/anlogic/brams_init.mk: techlibs/anlogic/brams_init.py
$(Q) mkdir -p techlibs/anlogic
$(P) $(PYTHON_EXECUTABLE) $<
$(Q) touch $@
techlibs/anlogic/brams_init_16.vh: techlibs/anlogic/brams_init.mk
techlibs/anlogic/brams_init_9.vh: techlibs/anlogic/brams_init.mk
techlibs/anlogic/brams_init_8.vh: techlibs/anlogic/brams_init.mk
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/arith_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_sim.v))
@ -10,3 +26,9 @@ $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/eagle_bb.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams.txt))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutram_init_16x4.vh))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/brams.txt))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/brams_map.v))
$(eval $(call add_gen_share_file,share/anlogic,techlibs/anlogic/brams_init_16.vh))
$(eval $(call add_gen_share_file,share/anlogic,techlibs/anlogic/brams_init_9.vh))
$(eval $(call add_gen_share_file,share/anlogic,techlibs/anlogic/brams_init_8.vh))