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Merge pull request #1794 from YosysHQ/dave/mince-abc9-fix

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ice40: Map unmapped 'mince' DFFs to gate level
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David Shah 2020-03-21 17:35:27 +00:00 committed by GitHub
parent f22f2000bd fa77fb857b
commit beab15b77c
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2 changed files with 18 additions and 0 deletions
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1
techlibs/ice40/synth_ice40.cc
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@ -345,6 +345,7 @@ struct SynthIce40Pass : public ScriptPass
if (min_ce_use >= 0) { if (min_ce_use >= 0) {
run("opt_merge"); run("opt_merge");
run(stringf("dff2dffe -unmap-mince %d", min_ce_use)); run(stringf("dff2dffe -unmap-mince %d", min_ce_use));
run("simplemap t:$dff");
} }
run("techmap -D NO_LUT -D NO_ADDER -map +/ice40/cells_map.v"); run("techmap -D NO_LUT -D NO_ADDER -map +/ice40/cells_map.v");
run("opt_expr -mux_undef"); run("opt_expr -mux_undef");

17
tests/various/ice40_mince_abc9.ys Normal file
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@ -0,0 +1,17 @@
read_verilog <<EOT
module top(input clk, ce, input [2:0] a, b, output reg [2:0] q);
reg [2:0] aa, bb;
always @(posedge clk) begin
if (ce) begin
aa <= a;
end
bb <= b;
q <= aa + bb;
end
endmodule
EOT
synth_ice40 -abc9 -dffe_min_ce_use 4