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Added spice backend

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This commit is contained in:
Clifford Wolf 2013-09-14 11:23:45 +02:00
parent 70476e2431
commit bbe5aa446b
6 changed files with 306 additions and 0 deletions
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11
techlibs/cmos/counter.ys Normal file
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read_verilog counter.v
read_verilog -lib cmos_cells.v
proc;; memory;; techmap;;
dfflibmap -liberty cmos_cells.lib
abc -liberty cmos_cells.lib;;
write_verilog synth.v
write_spice synth.sp