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tests: Add mixed_upto write_verilog test

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Krystine Sherwin 2026-06-19 11:15:08 +12:00
parent 338d4adef2
commit b77bb851ed
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tests/Makefile
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@ -75,6 +75,7 @@ MK_TEST_DIRS += ./memories
MK_TEST_DIRS += ./aiger
MK_TEST_DIRS += ./alumacc
MK_TEST_DIRS += ./check_mem
MK_TEST_DIRS += ./write_verilog
all: vanilla-test