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Selective boolopt

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This commit is contained in:
Alain Dargelas 2024-11-25 15:19:35 -08:00
parent e8e25b4cea
commit b2587f5e68
1 changed files with 1 additions and 1 deletions
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2
passes/techmap/aigmap.cc
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@ -135,7 +135,7 @@ struct AigmapPass : public Pass {
SigBit new_bit = module->addWire(NEW_ID2_SUFFIX("new_bit"));
auto gate = module->addNotGate(NEW_ID2_SUFFIX("inv"), bit, new_bit);
for (auto attr : cell->attributes)
gate->attributes[attr.first] = attr.second;
gate->attributes[attr.first] = attr.second;
bit = new_bit;
if (select_mode)
new_sel.insert(gate->name);