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https://github.com/YosysHQ/yosys
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Remove .c_str() calls from parameters to log_warning()/log_warning_noprefix()
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parent
d1fd6de6da
commit
a7c46f7b4a
25 changed files with 54 additions and 54 deletions
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@ -323,7 +323,7 @@ struct CheckPass : public Pass {
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string message = stringf("Drivers conflicting with a constant %s driver:\n", log_signal(state));
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for (auto str : wire_drivers[state])
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message += stringf(" %s\n", str);
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log_warning("%s", message.c_str());
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log_warning("%s", message);
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counter++;
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}
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@ -332,7 +332,7 @@ struct CheckPass : public Pass {
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string message = stringf("multiple conflicting drivers for %s.%s:\n", log_id(module), log_signal(it.first));
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for (auto str : it.second)
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message += stringf(" %s\n", str);
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log_warning("%s", message.c_str());
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log_warning("%s", message);
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counter++;
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}
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@ -418,7 +418,7 @@ struct CheckPass : public Pass {
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prev = bit;
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}
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log_warning("%s", message.c_str());
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log_warning("%s", message);
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counter++;
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}
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@ -658,7 +658,7 @@ static void select_op_expand(RTLIL::Design *design, const std::string &arg, char
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}
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if (rem_objects == 0)
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log_warning("reached configured limit at `%s'.\n", arg.c_str());
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log_warning("reached configured limit at `%s'.\n", arg);
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}
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static void select_filter_active_mod(RTLIL::Design *design, RTLIL::Selection &sel)
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@ -1002,14 +1002,14 @@ static void select_stmt(RTLIL::Design *design, std::string arg, bool disable_emp
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if (it.second == false && !disable_empty_warning) {
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std::string selection_str = select_blackboxes ? "=" : "";
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selection_str += it.first;
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log_warning("Selection \"%s\" did not match any module.\n", selection_str.c_str());
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log_warning("Selection \"%s\" did not match any module.\n", selection_str);
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}
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}
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for (auto &it : arg_memb_found) {
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if (it.second == false && !disable_empty_warning) {
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std::string selection_str = select_blackboxes ? "=" : "";
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selection_str += it.first;
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log_warning("Selection \"%s\" did not match any object.\n", selection_str.c_str());
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log_warning("Selection \"%s\" did not match any object.\n", selection_str);
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}
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}
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}
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@ -1451,7 +1451,7 @@ struct SelectPass : public Pass {
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while (std::getline(f, line)) {
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size_t slash_pos = line.find('/');
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if (slash_pos == string::npos) {
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log_warning("Ignoring line without slash in 'select -read': %s\n", line.c_str());
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log_warning("Ignoring line without slash in 'select -read': %s\n", line);
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continue;
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}
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IdString mod_name = RTLIL::escape_id(line.substr(0, slash_pos));
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@ -228,7 +228,7 @@ struct statdata_t {
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cell_area.at(cell_type).is_sequential = cell_data.is_sequential;
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} else {
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log_warning("too small single_parameter_area %s width: %d size: %d\n", cell_type.c_str(), max_width,
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log_warning("too small single_parameter_area %s width: %d size: %d\n", cell_type, max_width,
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(int)cell_data.single_parameter_area.size());
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cell_area.at(cell_type).area = cell_data.single_parameter_area.back();
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cell_area.at(cell_type).is_sequential = cell_data.is_sequential;
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@ -274,7 +274,7 @@ struct statdata_t {
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cell_data.double_parameter_area.at(width_a - 1).at(width_b - 1);
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cell_area.at(cell_type).is_sequential = cell_data.is_sequential;
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} else {
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log_warning("too small double_parameter_area %s, width_a: %d, width_b: %d, size_a: %d, size_b: %d\n", cell_type.c_str(),
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log_warning("too small double_parameter_area %s, width_a: %d, width_b: %d, size_a: %d, size_b: %d\n", cell_type,
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width_a, width_b, (int)cell_data.double_parameter_area.size(),
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(int)cell_data.double_parameter_area.at(width_a - 1).size());
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cell_area.at(cell_type).area = cell_data.double_parameter_area.back().back();
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@ -403,7 +403,7 @@ struct TimeestPass : Pass {
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for (auto m : d->selected_modules()) {
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if (!m->wire(RTLIL::escape_id(clk))) {
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log_warning("No domain '%s' in module %s\n", clk.c_str(), log_id(m));
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log_warning("No domain '%s' in module %s\n", clk, log_id(m));
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continue;
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}
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