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Merge remote-tracking branch 'diego/gowin'

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Pepijn de Vos 2019-09-04 11:20:05 +02:00
parent 0723672451 5aa8d7ceeb
commit a6d81a8d14
2 changed files with 2 additions and 2 deletions
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2
techlibs/gowin/arith_map.v
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@ -45,7 +45,7 @@ module _80_gw1n_alu(A, B, CI, BI, X, Y, CO);
genvar i; genvar i;
generate for (i = 0; i < Y_WIDTH; i = i + 1) begin:slice generate for (i = 0; i < Y_WIDTH; i = i + 1) begin:slice
ALU #(.ALU_MODE(32'b0)) ALU #(.ALU_MODE(0))
alu(.I0(AA[i]), alu(.I0(AA[i]),
.I1(BB[i]), .I1(BB[i]),
.I3(1'b0), .I3(1'b0),

2
techlibs/gowin/synth_gowin.cc
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@ -227,7 +227,7 @@ struct SynthGowinPass : public ScriptPass
if (check_label("vout")) if (check_label("vout"))
{ {
if (!vout_file.empty() || help_mode) if (!vout_file.empty() || help_mode)
run(stringf("write_verilog -nodec -attr2comment -defparam -renameprefix gen %s", run(stringf("write_verilog -nohex -decimal -attr2comment -defparam -renameprefix gen %s",
help_mode ? "<file-name>" : vout_file.c_str())); help_mode ? "<file-name>" : vout_file.c_str()));
} }
} }