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Remove trailing whitespaces
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317 changed files with 3136 additions and 3136 deletions
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@ -87,7 +87,7 @@ design -copy-from gate -as gate gate
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miter -equiv -make_assert -make_outcmp -flatten gold gate equiv
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sat -prove-asserts -seq 10 -show-public -verify -set-init-zero equiv
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#### Double loop (part-select, reset) ###
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#### Double loop (part-select, reset) ###
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design -reset
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read_verilog ./dynamic_part_select/reset_test.v
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proc
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@ -143,7 +143,7 @@ miter -equiv -make_assert -make_outcmp -flatten gold gate equiv
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sat -prove-asserts -show-public -verify -set-init-zero equiv
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###
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## Part select with obvious latch, expected to fail due comparison with old shift&mask AST transformation
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## Part select with obvious latch, expected to fail due comparison with old shift&mask AST transformation
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design -reset
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read_verilog ./dynamic_part_select/latch_002.v
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hierarchy -top latch_002; prep; async2sync
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