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Remove trailing whitespaces

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Miodrag Milanovic 2026-06-23 07:24:59 +02:00
parent 48a3dcc02a
commit a689342207
317 changed files with 3136 additions and 3136 deletions
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tests/various/bug1745.ys
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@ -3,6 +3,6 @@ read_verilog <<EOT
module inverter(input a, output y);
assign y = (a == 1'b0? 1'b1 : 1'b0);
endmodule // inverter
EOT