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Merge pull request #3984 from YosysHQ/module_hdlname
verific: save original module name
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commit
a54e6f2d1f
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@ -1275,6 +1275,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
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log("Importing module %s.\n", RTLIL::id2cstr(module->name));
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log("Importing module %s.\n", RTLIL::id2cstr(module->name));
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}
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}
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import_attributes(module->attributes, nl, nl);
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import_attributes(module->attributes, nl, nl);
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module->set_string_attribute(ID::hdlname, nl->CellBaseName());
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const char *param_name ;
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const char *param_name ;
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const char *param_value ;
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const char *param_value ;
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MapIter mi;
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MapIter mi;
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