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Update techlibs to avoid bits()

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This commit is contained in:
Robert O'Callahan 2025-08-28 01:55:56 +00:00
parent 360a625785
commit 975bbf2d6d
8 changed files with 22 additions and 26 deletions
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8
techlibs/xilinx/xilinx_dsp.cc
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@ -343,7 +343,7 @@ void xilinx_dsp_pack(xilinx_dsp_pm &pm)
// Since B is an exact power of 2, subtract 1
// by inverting all bits up until hitting
// that one hi bit
for (auto &b : B.bits())
for (auto b : B)
if (b == State::S0) b = State::S1;
else if (b == State::S1) {
b = State::S0;
@ -392,7 +392,7 @@ void xilinx_dsp_pack(xilinx_dsp_pm &pm)
continue;
for (int i = c.offset; i < c.offset+c.width; i++) {
log_assert(it->second[i] == State::S0 || it->second[i] == State::Sx);
it->second.bits()[i] = State::Sx;
it->second.set(i, State::Sx);
}
}
};
@ -579,7 +579,7 @@ void xilinx_dsp48a_pack(xilinx_dsp48a_pm &pm)
continue;
for (int i = c.offset; i < c.offset+c.width; i++) {
log_assert(it->second[i] == State::S0 || it->second[i] == State::Sx);
it->second.bits()[i] = State::Sx;
it->second.set(i, State::Sx);
}
}
};
@ -702,7 +702,7 @@ void xilinx_dsp_packC(xilinx_dsp_CREG_pm &pm)
continue;
for (int i = c.offset; i < c.offset+c.width; i++) {
log_assert(it->second[i] == State::S0 || it->second[i] == State::Sx);
it->second.bits()[i] = State::Sx;
it->second.set(i, State::Sx);
}
}
};