mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-05 22:06:04 +00:00
Code Activity

Build a temporary SigChunk list in the iterator in the cases where that's needed

Browse source
This commit is contained in:
Robert O'Callahan 2025-10-30 11:07:02 +00:00
parent 8c9dd3209a
commit 973e8a3928
4 changed files with 55 additions and 25 deletions
Download patch file Download diff file Expand all files Collapse all files

5
backends/verilog/verilog_backend.cc
View file

@ -382,8 +382,9 @@ void dump_sigspec(std::ostream &f, const RTLIL::SigSpec &sig)
dump_sigchunk(f, sig.as_chunk());
} else {
f << stringf("{ ");
for (auto it = sig.chunks().rbegin(); it != sig.chunks().rend(); ++it) {
if (it != sig.chunks().rbegin())
auto chunks = sig.chunks();
for (auto it = chunks.rbegin(); it != chunks.rend(); ++it) {
if (it != chunks.rbegin())
f << stringf(", ");
dump_sigchunk(f, *it, true);
}