mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-04 05:19:11 +00:00
Code Activity

Replaced RTLIL::Const::str with generic decoder method

Browse source
This commit is contained in:
Clifford Wolf 2013-12-04 14:14:05 +01:00
parent a2d053694b
commit 93a70959f3
21 changed files with 125 additions and 84 deletions
Download patch file Download diff file Expand all files Collapse all files

26
frontends/ast/ast.cc
View file

@ -677,6 +677,29 @@ RTLIL::Const AstNode::bitsAsConst(int width)
return bitsAsConst(width, is_signed);
}
RTLIL::Const AstNode::asAttrConst()
{
log_assert(type == AST_CONSTANT);
RTLIL::Const val;
val.bits = bits;
if (!str.empty()) {
val.flags |= RTLIL::CONST_FLAG_STRING;
log_assert(val.decode_string() == str);
}
return val;
}
RTLIL::Const AstNode::asParaConst()
{
RTLIL::Const val = asAttrConst();
if (is_signed)
val.flags |= RTLIL::CONST_FLAG_SIGNED;
return val;
}
// create a new AstModule from an AST_MODULE AST node
static AstModule* process_module(AstNode *ast)
{
@ -729,8 +752,7 @@ static AstModule* process_module(AstNode *ast)
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), ast->filename.c_str(), ast->linenum);
current_module->attributes[attr.first].str = attr.second->str;
current_module->attributes[attr.first].bits = attr.second->bits;
current_module->attributes[attr.first] = attr.second->asAttrConst();
}
for (size_t i = 0; i < ast->children.size(); i++) {
AstNode *node = ast->children[i];

2
frontends/ast/ast.h
View file

@ -216,6 +216,8 @@ namespace AST
// helper function for creating sign-extended const objects
RTLIL::Const bitsAsConst(int width, bool is_signed);
RTLIL::Const bitsAsConst(int width = -1);
RTLIL::Const asAttrConst();
RTLIL::Const asParaConst();
};
// process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code

33
frontends/ast/genrtlil.cc
View file

@ -70,8 +70,7 @@ static RTLIL::SigSpec uniop2rtlil(AstNode *that, std::string type, int result_wi
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), that->filename.c_str(), that->linenum);
cell->attributes[attr.first].str = attr.second->str;
cell->attributes[attr.first].bits = attr.second->bits;
cell->attributes[attr.first] = attr.second->asAttrConst();
}
cell->parameters["\\A_SIGNED"] = RTLIL::Const(that->children[0]->is_signed);
@ -120,8 +119,7 @@ static void widthExtend(AstNode *that, RTLIL::SigSpec &sig, int width, bool is_s
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), that->filename.c_str(), that->linenum);
cell->attributes[attr.first].str = attr.second->str;
cell->attributes[attr.first].bits = attr.second->bits;
cell->attributes[attr.first] = attr.second->asAttrConst();
}
cell->parameters["\\A_SIGNED"] = RTLIL::Const(is_signed);
@ -164,8 +162,7 @@ static RTLIL::SigSpec binop2rtlil(AstNode *that, std::string type, int result_wi
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), that->filename.c_str(), that->linenum);
cell->attributes[attr.first].str = attr.second->str;
cell->attributes[attr.first].bits = attr.second->bits;
cell->attributes[attr.first] = attr.second->asAttrConst();
}
cell->parameters["\\A_SIGNED"] = RTLIL::Const(that->children[0]->is_signed);
@ -215,8 +212,7 @@ static RTLIL::SigSpec mux2rtlil(AstNode *that, const RTLIL::SigSpec &cond, const
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), that->filename.c_str(), that->linenum);
cell->attributes[attr.first].str = attr.second->str;
cell->attributes[attr.first].bits = attr.second->bits;
cell->attributes[attr.first] = attr.second->asAttrConst();
}
cell->parameters["\\WIDTH"] = RTLIL::Const(left.width);
@ -271,8 +267,7 @@ struct AST_INTERNAL::ProcessGenerator
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), always->filename.c_str(), always->linenum);
proc->attributes[attr.first].str = attr.second->str;
proc->attributes[attr.first].bits = attr.second->bits;
proc->attributes[attr.first] = attr.second->asAttrConst();
}
current_module->processes[proc->name] = proc;
current_case = &proc->root_case;
@ -491,8 +486,7 @@ struct AST_INTERNAL::ProcessGenerator
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), ast->filename.c_str(), ast->linenum);
sw->attributes[attr.first].str = attr.second->str;
sw->attributes[attr.first].bits = attr.second->bits;
sw->attributes[attr.first] = attr.second->asAttrConst();
}
RTLIL::SigSpec this_case_eq_lvalue;
@ -854,8 +848,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), filename.c_str(), linenum);
wire->attributes[attr.first].str = attr.second->str;
wire->attributes[attr.first].bits = attr.second->bits;
wire->attributes[attr.first] = attr.second->asAttrConst();
}
}
break;
@ -890,8 +883,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), filename.c_str(), linenum);
memory->attributes[attr.first].str = attr.second->str;
memory->attributes[attr.first].bits = attr.second->bits;
memory->attributes[attr.first] = attr.second->asAttrConst();
}
}
break;
@ -1314,13 +1306,11 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
snprintf(buf, 100, "$%d", ++para_counter);
if (child->children[0]->is_signed)
cell->signed_parameters.insert(buf);
cell->parameters[buf].str = child->children[0]->str;
cell->parameters[buf].bits = child->children[0]->bits;
cell->parameters[buf] = child->children[0]->asParaConst();
} else {
if (child->children[0]->is_signed)
cell->signed_parameters.insert(child->str);
cell->parameters[child->str].str = child->children[0]->str;
cell->parameters[child->str].bits = child->children[0]->bits;
cell->parameters[child->str] = child->children[0]->asParaConst();
}
continue;
}
@ -1343,8 +1333,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
if (attr.second->type != AST_CONSTANT)
log_error("Attribute `%s' with non-constant value at %s:%d!\n",
attr.first.c_str(), filename.c_str(), linenum);
cell->attributes[attr.first].str = attr.second->str;
cell->attributes[attr.first].bits = attr.second->bits;
cell->attributes[attr.first] = attr.second->asAttrConst();
}
if (current_module->cells.count(cell->name) != 0)
log_error("Re-definition of cell `%s' at %s:%d!\n",