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opt_expr: simplify any unsigned comparisons with all-0 and all-1.

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Before this commit, only unsigned comparisons with all-0 would be
simplified. This commit also makes the code handling such comparisons
to be more rigorous and not abort on unexpected input.
This commit is contained in:
whitequark 2019-01-02 02:45:49 +00:00
parent 4b9f619349
commit 8e53d2e0bf
3 changed files with 84 additions and 17 deletions
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11
tests/opt/opt_expr_cmp.v Normal file
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@ -0,0 +1,11 @@
module top(...);
input [3:0] a;
output o1 = 4'b0000 > a;
output o2 = 4'b0000 <= a;
output o3 = 4'b1111 < a;
output o4 = 4'b1111 >= a;
output o5 = a < 4'b0000;
output o6 = a >= 4'b0000;
output o7 = a > 4'b1111;
output o8 = a <= 4'b1111;
endmodule

4
tests/opt/opt_expr_cmp.ys Normal file
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@ -0,0 +1,4 @@
read_verilog opt_expr_cmp.v
equiv_opt -assert opt_expr -fine
design -load postopt
select -assert-count 0 t:$gt t:$ge t:$lt t:$le