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patch: WIP multicell patch test
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3 changed files with 21 additions and 9 deletions
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@ -37,6 +37,7 @@ Wire* Patch::addWire(IdString name, int width) {
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// TODO code golf
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RTLIL::Wire *RTLIL::Patch::addWire(RTLIL::IdString name, const RTLIL::Wire *other)
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{
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RTLIL::Wire *wire = addWire(std::move(name));
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@ -76,6 +77,7 @@ void Patch::patch(Cell* old_cell, Cell* new_cell) {
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if (raw == new_cell)
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if (dir == PD_OUTPUT || dir == PD_INOUT) {
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// RAUW
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// TODO optimized implementation for signorm fanout transfer?
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old_cell->setPort(port_name, mod->addWire(NEW_ID, sig.size()));
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new_cell->setPort(port_name, sig);
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auto* wire = sig.as_wire();
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