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Merge pull request #1739 from YosysHQ/eddie/issue1738

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ice40: fix specify for -device {lp,u}
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Eddie Hung 2020-03-05 09:41:54 -08:00 committed by GitHub
parent 0930c00f03 69f1555058
commit 8b074cc473
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2 changed files with 18 additions and 7 deletions
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8
techlibs/ice40/cells_sim.v
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@ -2020,7 +2020,7 @@ specify
$setuphold(negedge CLK, negedge SR, 113:125:140, 0:0:0); $setuphold(negedge CLK, negedge SR, 113:125:140, 0:0:0);
endspecify endspecify
`endif `endif
`ifdef ICE40_LX `ifdef ICE40_LP
specify specify
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L79 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L79
(CIN => COUT) = (118:153:186, 98:128:155); (CIN => COUT) = (118:153:186, 98:128:155);
@ -2045,7 +2045,7 @@ specify
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L89 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L89
(I3 => LO) = (249:323:393, 255:332:403); (I3 => LO) = (249:323:393, 255:332:403);
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L90
(posedge CLK => O) = (504:655:796, 504:655:796); (posedge CLK => (O : 1'bx)) = (504:655:796, 504:655:796);
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91-L92 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L91-L92
(SR => O) = (559:726:883, 559:726:883); (SR => O) = (559:726:883, 559:726:883);
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_lp1k.txt#L74
@ -2109,7 +2109,7 @@ specify
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L101 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L101
(I3 => LO) = (216:378:583, 226:395:609); (I3 => LO) = (216:378:583, 226:395:609);
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L102
(posedge CLK => O) = (516:903:1391, 516:903:1391); (posedge CLK => (O : 1'bx)) = (516:903:1391, 516:903:1391);
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103-104 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L103-104
(SR => O) = (420:734:1131, 590:1032:1589); (SR => O) = (420:734:1131, 590:1032:1589);
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L86
@ -2366,7 +2366,7 @@ module SB_SPRAM256KA (
`endif `endif
`ifdef ICE40_U `ifdef ICE40_U
specify specify
https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13169-L13182 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13169-L13182
$setup(posedge ADDRESS, posedge CLOCK, 268); $setup(posedge ADDRESS, posedge CLOCK, 268);
// https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13183 // https://github.com/cliffordwolf/icestorm/blob/95949315364f8d9b0c693386aefadf44b28e2cf6/icefuzz/timings_up5k.txt#L13183
$setup(CHIPSELECT, posedge CLOCK, 404); $setup(CHIPSELECT, posedge CLOCK, 404);

17
tests/arch/run-test.sh
View file

@ -2,12 +2,23 @@
set -e set -e
declare -A defines=( ["ice40"]="ICE40_HX ICE40_LP ICE40_U" )
echo "Running syntax check on arch sim models" echo "Running syntax check on arch sim models"
for arch in ../../techlibs/*; do for arch in ../../techlibs/*; do
find $arch -name cells_sim.v | while read path; do find $arch -name cells_sim.v | while read path; do
echo -n "Test $path ->" arch_name=$(basename -- $arch)
iverilog -t null -I$arch $path if [ "${defines[$arch_name]}" ]; then
echo " ok" for def in ${defines[$arch_name]}; do
echo -n "Test $path -D$def ->"
iverilog -t null -I$arch -D$def $path
echo " ok"
done
else
echo -n "Test $path ->"
iverilog -t null -I$arch $path
echo " ok"
fi
done done
done done