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Merge 784de0f6e3 into 378add3723

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Miodrag Milanović 2025-06-04 17:22:50 +02:00 • committed by GitHub
commit 8adb8a3fec
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1 changed files with 5 additions and 12 deletions
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17
passes/techmap/attrmap.cc
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@ -270,26 +270,19 @@ struct AttrmapPass : public Pass {
{ {
for (auto module : design->selected_modules()) for (auto module : design->selected_modules())
{ {
for (auto wire : module->selected_wires()) for (auto wire : module->selected_members())
attrmap_apply(stringf("%s.%s", log_id(module), log_id(wire)), actions, wire->attributes); attrmap_apply(stringf("%s.%s", log_id(module), log_id(wire)), actions, wire->attributes);
for (auto cell : module->selected_cells()) for (auto proc : module->selected_processes())
attrmap_apply(stringf("%s.%s", log_id(module), log_id(cell)), actions, cell->attributes);
for (auto proc : module->processes)
{ {
if (!design->selected(module, proc.second)) std::vector<RTLIL::CaseRule*> all_cases = {&proc->root_case};
continue;
attrmap_apply(stringf("%s.%s", log_id(module), log_id(proc.first)), actions, proc.second->attributes);
std::vector<RTLIL::CaseRule*> all_cases = {&proc.second->root_case};
while (!all_cases.empty()) { while (!all_cases.empty()) {
RTLIL::CaseRule *cs = all_cases.back(); RTLIL::CaseRule *cs = all_cases.back();
all_cases.pop_back(); all_cases.pop_back();
attrmap_apply(stringf("%s.%s (case)", log_id(module), log_id(proc.first)), actions, cs->attributes); attrmap_apply(stringf("%s.%s (case)", log_id(module), log_id(proc)), actions, cs->attributes);
for (auto &sw : cs->switches) { for (auto &sw : cs->switches) {
attrmap_apply(stringf("%s.%s (switch)", log_id(module), log_id(proc.first)), actions, sw->attributes); attrmap_apply(stringf("%s.%s (switch)", log_id(module), log_id(proc)), actions, sw->attributes);
all_cases.insert(all_cases.end(), sw->cases.begin(), sw->cases.end()); all_cases.insert(all_cases.end(), sw->cases.begin(), sw->cases.end());
} }
} }