mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-05-25 19:36:21 +00:00
Code Activity

test_patch total basics

Browse source
This commit is contained in:
Emil J. Tywoniak 2025-12-31 17:46:27 +01:00
parent 6f0be1b4e9
commit 89e5c4ccca
4 changed files with 62 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

20
kernel/unstable/patch.cc
View file

@ -1,4 +1,6 @@
#include "kernel/unstable/patch.h"
#include "kernel/celltypes.h"
#include "kernel/rtlil.h"
YOSYS_NAMESPACE_BEGIN
@ -10,6 +12,24 @@ Cell* Patch::addCell(IdString name, IdString type) {
return &cell;
}
void Patch::patch() {
for (auto& cell: cells_) {
Cell* new_cell = mod->addCell(cell.name, &cell);
for (auto [port_name, sig] : new_cell->connections()) {
log_assert(yosys_celltypes.cell_known(cell.type));
auto dir = cell.port_dir(port_name);
if (dir == PD_OUTPUT || dir == PD_INOUT) {
for (auto chunk : sig.chunks()) {
log_assert(chunk.is_wire());
auto* wire = chunk.wire;
wire->driverCell_->setPort(wire->driverPort_, SigSpec());
wire->driverCell_ = new_cell;
wire->driverPort_ = port_name;
}
}
}
}
}
YOSYS_NAMESPACE_END