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synth_gatemate: Update pass

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* remove `write_edif` and `write_blif` options
* remove redundant `abc` call before muxcover
* update style
This commit is contained in:
Patrick Urban 2021-10-25 11:10:00 +02:00 • committed by Marcelina Kościelnicka
parent 74aee88e81
commit 81964d6d6f
2 changed files with 33 additions and 69 deletions
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90
techlibs/gatemate/synth_gatemate.cc
View file

@ -44,14 +44,6 @@ struct SynthGateMatePass : public ScriptPass
log(" write the design to the specified verilog file. Writing of an output\n"); log(" write the design to the specified verilog file. Writing of an output\n");
log(" file is omitted if this parameter is not specified.\n"); log(" file is omitted if this parameter is not specified.\n");
log("\n"); log("\n");
log(" -blif <file>\n");
log(" write the design to the specified BLIF file. Writing of an output file\n");
log(" is omitted if this parameter is not specified.\n");
log("\n");
log(" -edif <file>\n");
log(" write the design to the specified EDIF file. Writing of an output file\n");
log(" is omitted if this parameter is not specified.\n");
log("\n");
log(" -json <file>\n"); log(" -json <file>\n");
log(" write the design to the specified JSON file. Writing of an output file\n"); log(" write the design to the specified JSON file. Writing of an output file\n");
log(" is omitted if this parameter is not specified.\n"); log(" is omitted if this parameter is not specified.\n");
@ -77,7 +69,7 @@ struct SynthGateMatePass : public ScriptPass
log(" do not use CC_MX{8,4} multiplexer cells in output netlist.\n"); log(" do not use CC_MX{8,4} multiplexer cells in output netlist.\n");
log("\n");; log("\n");;
log(" -dff\n"); log(" -dff\n");
log(" run 'abc'/'abc9' with -dff option\n"); log(" run 'abc' with -dff option\n");
log("\n"); log("\n");
log(" -retime\n"); log(" -retime\n");
log(" run 'abc' with '-dff -D 1' options\n"); log(" run 'abc' with '-dff -D 1' options\n");
@ -94,15 +86,13 @@ struct SynthGateMatePass : public ScriptPass
log("\n"); log("\n");
} }
string top_opt, vlog_file, blif_file, edif_file, json_file; string top_opt, vlog_file, json_file;
bool noflatten, nobram, noaddf, nomult, nomx4, nomx8, dff, retime, noiopad, noclkbuf; bool noflatten, nobram, noaddf, nomult, nomx4, nomx8, dff, retime, noiopad, noclkbuf;
void clear_flags() override void clear_flags() override
{ {
top_opt = "-auto-top"; top_opt = "-auto-top";
vlog_file = ""; vlog_file = "";
blif_file = "";
edif_file = "";
json_file = ""; json_file = "";
noflatten = false; noflatten = false;
nobram = false; nobram = false;
@ -132,14 +122,6 @@ struct SynthGateMatePass : public ScriptPass
vlog_file = args[++argidx]; vlog_file = args[++argidx];
continue; continue;
} }
if (args[argidx] == "-blif" && argidx+1 < args.size()) {
blif_file = args[++argidx];
continue;
}
if (args[argidx] == "-edif" && argidx+1 < args.size()) {
edif_file = args[++argidx];
continue;
}
if (args[argidx] == "-json" && argidx+1 < args.size()) { if (args[argidx] == "-json" && argidx+1 < args.size()) {
json_file = args[++argidx]; json_file = args[++argidx];
continue; continue;
@ -233,17 +215,16 @@ struct SynthGateMatePass : public ScriptPass
run("wreduce"); run("wreduce");
run("peepopt"); run("peepopt");
run("opt_clean"); run("opt_clean");
run("muxpack");
run("share"); run("share");
run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4"); run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4");
run("opt_expr"); run("opt_expr");
run("opt_clean"); run("opt_clean");
} }
if (check_label("map_mult", "(skip if '-nomult')")) if (check_label("map_mult", "(skip if '-nomult')") && !nomult)
{ {
if (!nomult) { run("techmap -map +/gatemate/mul_map.v");
run("techmap -map +/gatemate/mul_map.v");
}
} }
if (check_label("coarse")) if (check_label("coarse"))
@ -254,17 +235,15 @@ struct SynthGateMatePass : public ScriptPass
run("opt_clean"); run("opt_clean");
} }
if (check_label("map_bram", "(skip if '-nobram')")) if (check_label("map_bram", "(skip if '-nobram')") && !nobram)
{ {
if (!nobram) { run("memory_bram -rules +/gatemate/brams.txt");
run("memory_bram -rules +/gatemate/brams.txt"); run("setundef -zero -params "
run("setundef -zero -params " "t:$__CC_BRAM_CASCADE "
"t:$__CC_BRAM_CASCADE " "t:$__CC_BRAM_40K_SDP t:$__CC_BRAM_20K_SDP "
"t:$__CC_BRAM_40K_SDP t:$__CC_BRAM_20K_SDP " "t:$__CC_BRAM_20K_TDP t:$__CC_BRAM_40K_TDP "
"t:$__CC_BRAM_20K_TDP t:$__CC_BRAM_40K_TDP " );
); run("techmap -map +/gatemate/brams_map.v");
run("techmap -map +/gatemate/brams_map.v");
}
} }
if (check_label("map_ffram")) if (check_label("map_ffram"))
@ -287,18 +266,16 @@ struct SynthGateMatePass : public ScriptPass
} }
} }
if (check_label("map_io", "(skip if '-noiopad')")) if (check_label("map_io", "(skip if '-noiopad')") && !noiopad)
{ {
if (!noiopad) { run("iopadmap -bits "
run("iopadmap -bits " "-inpad CC_IBUF Y:I "
"-inpad CC_IBUF Y:I " "-outpad CC_OBUF A:O "
"-outpad CC_OBUF A:O " "-toutpad $__toutpad OE:A:O "
"-toutpad $__toutpad OE:A:O " "-tinoutpad $__tinoutpad OE:Y:A:IO"
"-tinoutpad $__tinoutpad OE:Y:A:IO" );
); run("techmap -map +/gatemate/iob_map.v");
run("techmap -map +/gatemate/iob_map.v"); run("clean");
run("clean");
}
} }
if (check_label("map_regs")) if (check_label("map_regs"))
@ -313,7 +290,6 @@ struct SynthGateMatePass : public ScriptPass
if (check_label("map_muxs")) if (check_label("map_muxs"))
{ {
run("abc -g simple"); // optimize design before muxcover
std::string muxcover_args; std::string muxcover_args;
if (!nomx4) { if (!nomx4) {
muxcover_args += stringf(" -mux4"); muxcover_args += stringf(" -mux4");
@ -342,12 +318,10 @@ struct SynthGateMatePass : public ScriptPass
run("clean"); run("clean");
} }
if (check_label("map_bufg", "(skip if '-noclkbuf')")) if (check_label("map_bufg", "(skip if '-noclkbuf')") && !noclkbuf)
{ {
if (!noclkbuf) { run("clkbufmap -buf CC_BUFG O:I");
run("clkbufmap -buf CC_BUFG O:I"); run("clean");
run("clean");
}
} }
if (check_label("check")) if (check_label("check"))
@ -366,26 +340,12 @@ struct SynthGateMatePass : public ScriptPass
} }
} }
if (check_label("edif"))
{
if (!edif_file.empty() || help_mode) {
run(stringf("write_edif %s", help_mode ? "<file-name>" : edif_file.c_str()));
}
}
if (check_label("json")) if (check_label("json"))
{ {
if (!json_file.empty() || help_mode) { if (!json_file.empty() || help_mode) {
run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str())); run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));
} }
} }
if (check_label("blif"))
{
if (!blif_file.empty() || help_mode) {
run(stringf("write_blif %s", edif_file.c_str()));
}
}
} }
} SynthGateMatePass; } SynthGateMatePass;

12
tests/arch/gatemate/mux.ys
View file

@ -7,8 +7,10 @@ proc
equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux4 # Constrain all select calls below inside the top module cd mux4 # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_MX4 select -assert-max 1 t:CC_LUT2
select -assert-none t:CC_MX4 %% t:* %D select -assert-max 2 t:CC_LUT4
select -assert-max 1 t:CC_MX2
select -assert-none t:CC_LUT2 t:CC_LUT4 t:CC_MX2 %% t:* %D
design -load read design -load read
hierarchy -top mux8 hierarchy -top mux8
@ -16,5 +18,7 @@ proc
equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux8 # Constrain all select calls below inside the top module cd mux8 # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_MX8 select -assert-max 1 t:CC_LUT3
select -assert-none t:CC_MX8 %% t:* %D select -assert-max 5 t:CC_LUT4
select -assert-max 1 t:CC_MX2
select -assert-none t:CC_LUT3 t:CC_LUT4 t:CC_MX2 %% t:* %D