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synth_gatemate: Update pass

* remove `write_edif` and `write_blif` options
* remove redundant `abc` call before muxcover
* update style
This commit is contained in:
Patrick Urban 2021-10-25 11:10:00 +02:00 committed by Marcelina Kościelnicka
parent 74aee88e81
commit 81964d6d6f
2 changed files with 33 additions and 69 deletions

View file

@ -7,8 +7,10 @@ proc
equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux4 # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_MX4
select -assert-none t:CC_MX4 %% t:* %D
select -assert-max 1 t:CC_LUT2
select -assert-max 2 t:CC_LUT4
select -assert-max 1 t:CC_MX2
select -assert-none t:CC_LUT2 t:CC_LUT4 t:CC_MX2 %% t:* %D
design -load read
hierarchy -top mux8
@ -16,5 +18,7 @@ proc
equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux8 # Constrain all select calls below inside the top module
select -assert-count 1 t:CC_MX8
select -assert-none t:CC_MX8 %% t:* %D
select -assert-max 1 t:CC_LUT3
select -assert-max 5 t:CC_LUT4
select -assert-max 1 t:CC_MX2
select -assert-none t:CC_LUT3 t:CC_LUT4 t:CC_MX2 %% t:* %D