mirror of
https://github.com/YosysHQ/yosys
synced 2025-08-16 16:27:12 +00:00
Fix TODOs
This commit is contained in:
parent
983068103e
commit
7de9c33931
2 changed files with 0 additions and 20 deletions
|
@ -79,11 +79,6 @@ endcode
|
|||
// (attached to at most two $mux cells that implement clock-enable or
|
||||
// reset functionality, using a subpattern discussed below)
|
||||
code argQ ffC ffCcemux ffCrstmux ffCcepol ffCrstpol sigC clock
|
||||
// TODO: Any downside to allowing this?
|
||||
// If this DSP implements an accumulator, do not attempt to match
|
||||
if (sigC == sigP)
|
||||
reject;
|
||||
|
||||
argQ = sigC;
|
||||
subpattern(in_dffe);
|
||||
if (dff) {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue