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https://github.com/YosysHQ/yosys
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Smallfixes
This commit is contained in:
parent
4288594422
commit
780f1bd705
2 changed files with 43 additions and 43 deletions
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@ -594,6 +594,14 @@ struct OptFirstFitAllocWorker : CutRegionWorker {
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}
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SigBit emit_and(Cell *anchor, SigBit a, SigBit b)
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{
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// Const-fold 0/1 operands so prefix-OR / category scans don't emit
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// dead $and cells that only inflate cells_added until opt_expr.
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if (a == State::S0 || b == State::S0)
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return State::S0;
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if (a == State::S1)
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return b;
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if (b == State::S1)
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return a;
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Cell *cell = anchor;
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SigBit o = module->And(NEW_ID2_SUFFIX("ffa_and"), SigSpec(a), SigSpec(b), false, cell_src(anchor))[0];
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cells_added++;
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@ -601,6 +609,14 @@ struct OptFirstFitAllocWorker : CutRegionWorker {
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}
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SigBit emit_or(Cell *anchor, SigBit a, SigBit b)
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{
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// Same for $or: exclusive prefix starts at S0 and would otherwise
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// produce a cascade of (x | 0) cells on every Hillis-Steele step.
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if (a == State::S1 || b == State::S1)
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return State::S1;
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if (a == State::S0)
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return b;
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if (b == State::S0)
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return a;
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Cell *cell = anchor;
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SigBit o = module->Or(NEW_ID2_SUFFIX("ffa_or"), SigSpec(a), SigSpec(b), false, cell_src(anchor))[0];
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cells_added++;
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@ -23,6 +23,8 @@
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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#include "passes/opt/rewrite_utils.h"
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struct OptVpsWorker
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{
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struct PmuxInfo {
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@ -476,12 +478,10 @@ struct OptVpsWorker
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Wire *sub_w = module->addWire(
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NEW_ID_SUFFIX("vps_merge_idx"),
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GetSize(binary_index));
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Cell *sub = module->addSub(NEW_ID_SUFFIX("vps_merge_sub"),
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module->addSub(NEW_ID_SUFFIX("vps_merge_sub"),
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binary_index,
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Const(base_sub, GetSize(binary_index)),
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sub_w);
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sub->add_strpool_attribute(ID::src,
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lowest.pmux->get_strpool_attribute(ID::src));
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sub_w, false, cell_src(lowest.pmux));
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raw_idx = SigSpec(sub_w);
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} else {
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raw_idx = binary_index;
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@ -557,9 +557,7 @@ struct OptVpsWorker
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Wire *merged_y = module->addWire(
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NEW_ID_SUFFIX("vps_merge_y"), combined_W);
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Cell *shr = module->addShr(NEW_ID_SUFFIX("vps_merge_shr"),
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source, shift_amount, SigSpec(merged_y));
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shr->add_strpool_attribute(ID::src,
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lowest.pmux->get_strpool_attribute(ID::src));
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source, shift_amount, SigSpec(merged_y), false, cell_src(lowest.pmux));
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vps_shr_cells.insert(shr);
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int lowest_eff_off = eff_offset(lowest);
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@ -678,12 +676,10 @@ struct OptVpsWorker
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Wire *sub_w = module->addWire(
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NEW_ID_SUFFIX("vps_merge_idx"),
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GetSize(binary_index));
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Cell *sub = module->addSub(NEW_ID_SUFFIX("vps_merge_sub"),
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module->addSub(NEW_ID_SUFFIX("vps_merge_sub"),
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binary_index,
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Const(lowest_base, GetSize(binary_index)),
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sub_w);
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sub->add_strpool_attribute(ID::src,
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lowest.pmux->get_strpool_attribute(ID::src));
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sub_w, false, cell_src(lowest.pmux));
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raw_idx = SigSpec(sub_w);
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}
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@ -752,9 +748,7 @@ struct OptVpsWorker
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Wire *merged_y = module->addWire(
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NEW_ID_SUFFIX("vps_merge_y"), combined_W);
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Cell *shr = module->addShr(NEW_ID_SUFFIX("vps_merge_shr"),
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source, shift_amount, SigSpec(merged_y));
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shr->add_strpool_attribute(ID::src,
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ref_pmux->get_strpool_attribute(ID::src));
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source, shift_amount, SigSpec(merged_y), false, cell_src(ref_pmux));
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vps_shr_cells.insert(shr);
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int lowest_eff_off = eff_offset(lowest);
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@ -935,9 +929,7 @@ struct OptVpsWorker
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NEW_ID_SUFFIX("vps_shared_y"), reg_width);
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Cell *shared_shr = module->addShr(
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NEW_ID_SUFFIX("vps_shared_shr"),
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reg_source, ref_shift, SigSpec(shared_y));
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shared_shr->add_strpool_attribute(ID::src,
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ref_info.shr->get_strpool_attribute(ID::src));
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reg_source, ref_shift, SigSpec(shared_y), false, cell_src(ref_info.shr));
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log(" VPS shared barrel shifter: %s (reg=%s, width=%d, "
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"align=%d, serves %d reads, ref_offset=%d)\n",
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@ -1194,9 +1186,9 @@ struct OptVpsWorker
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SigSpec raw_idx = binary_index;
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if (base > 0) {
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Wire *sub_w = module->addWire(NEW_ID_SUFFIX("vps_rd_idx"), GetSize(binary_index));
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Cell *sub = module->addSub(NEW_ID_SUFFIX("vps_rd_sub"),
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binary_index, Const(base, GetSize(binary_index)), sub_w);
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sub->add_strpool_attribute(ID::src, cell->get_strpool_attribute(ID::src));
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module->addSub(NEW_ID_SUFFIX("vps_rd_sub"),
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binary_index, Const(base, GetSize(binary_index)), sub_w,
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false, cell_src(cell));
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raw_idx = SigSpec(sub_w);
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}
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if (log2_align > 0) {
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@ -1212,8 +1204,7 @@ struct OptVpsWorker
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src_bits = GetSize(source);
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Cell *shr = module->addShr(NEW_ID_SUFFIX("vps_rd_shr"),
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source, shift_amount, sig_y);
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shr->add_strpool_attribute(ID::src, cell->get_strpool_attribute(ID::src));
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source, shift_amount, sig_y, false, cell_src(cell));
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vps_shr_cells.insert(shr);
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} else {
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// Stride=W: pack windows sequentially, shift by W*binary_index
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@ -1264,8 +1255,7 @@ struct OptVpsWorker
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src_bits = GetSize(packed);
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Cell *shr = module->addShr(NEW_ID_SUFFIX("vps_rd_shr"),
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packed, shifted_idx, sig_y);
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shr->add_strpool_attribute(ID::src, cell->get_strpool_attribute(ID::src));
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packed, shifted_idx, sig_y, false, cell_src(cell));
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vps_shr_cells.insert(shr);
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}
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@ -1466,10 +1456,9 @@ struct OptVpsWorker
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if (upper_width > 0) {
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int lane_idx = base / W + L;
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Wire *eq_w = module->addWire(NEW_ID_SUFFIX("vps_lane_eq"), 1);
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Cell *eq = module->addEq(NEW_ID_SUFFIX("vps_lane_cmp"),
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upper_bits, Const(lane_idx, upper_width), eq_w);
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eq->add_strpool_attribute(ID::src,
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candidates[group_start + L * W].cell->get_strpool_attribute(ID::src));
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module->addEq(NEW_ID_SUFFIX("vps_lane_cmp"),
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upper_bits, Const(lane_idx, upper_width), eq_w,
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false, cell_src(candidates[group_start + L * W].cell));
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range_bit = SigBit(eq_w);
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} else {
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range_bit = State::S1;
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@ -1495,9 +1484,8 @@ struct OptVpsWorker
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lane_en[L] = lane_bits[0];
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} else {
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Wire *w = module->addWire(NEW_ID_SUFFIX("vps_lane_en"), 1);
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Cell *ror = module->addReduceOr(NEW_ID_SUFFIX("vps_lane_or"), lane_bits, w);
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ror->add_strpool_attribute(ID::src,
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candidates[group_start + L * W].cell->get_strpool_attribute(ID::src));
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module->addReduceOr(NEW_ID_SUFFIX("vps_lane_or"), lane_bits, w,
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false, cell_src(candidates[group_start + L * W].cell));
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lane_en[L] = SigBit(w);
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}
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}
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@ -1609,17 +1597,14 @@ struct OptVpsWorker
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}
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Wire *gated_w = module->addWire(NEW_ID_SUFFIX("vps_wr_lane_en"), 1);
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Cell *lane_and = module->addAnd(NEW_ID_SUFFIX("vps_wr_lane_and"),
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Cell *src_cell = candidates[group_start + L * W].cell;
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module->addAnd(NEW_ID_SUFFIX("vps_wr_lane_and"),
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SigSpec(wr_en_sig), SigSpec(lane_en[L]),
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SigSpec(gated_w));
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lane_and->add_strpool_attribute(ID::src,
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candidates[group_start + L * W].cell->get_strpool_attribute(ID::src));
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SigSpec(gated_w), false, cell_src(src_cell));
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Cell *lane_mux = module->addMux(
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module->addMux(
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NEW_ID_SUFFIX("vps_lane_mux"),
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q_lane, data_lane, SigBit(gated_w), fb_y_lane);
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lane_mux->add_strpool_attribute(ID::src,
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candidates[group_start + L * W].cell->get_strpool_attribute(ID::src));
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q_lane, data_lane, SigBit(gated_w), fb_y_lane, cell_src(src_cell));
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}
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for (auto c : cells_to_remove)
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@ -1648,10 +1633,9 @@ struct OptVpsWorker
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SigBit data_bit = cell_b[W - 1 - b];
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SigSpec sig_y = pmux_cell->getPort(ID::Y);
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Cell *mux = module->addMux(NEW_ID_SUFFIX("vps_mux"),
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State::S0, data_bit, lane_en[L], sig_y);
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mux->add_strpool_attribute(ID::src,
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pmux_cell->get_strpool_attribute(ID::src));
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module->addMux(NEW_ID_SUFFIX("vps_mux"),
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State::S0, data_bit, lane_en[L], sig_y,
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cell_src(pmux_cell));
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SigSpec pmux_s = sigmap(pmux_cell->getPort(ID::S));
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auto it = reduce_or_map.find(pmux_s);
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