3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-23 17:15:33 +00:00

fmt: rudimentary %m support (= %l)

This commit is contained in:
Charlotte 2023-06-28 11:51:21 +10:00 committed by Marcelina Kościelnicka
parent c382d7d3ac
commit 75b44f21d1
4 changed files with 34 additions and 0 deletions

View file

@ -291,6 +291,9 @@ void Fmt::parse_verilog(const std::vector<VerilogFmtArg> &args, bool sformat_lik
} else if (fmt.substr(i, 2) == "%l" || fmt.substr(i, 2) == "%L") {
i++;
part.str += module_name.str();
} else if (fmt.substr(i, 2) == "%m" || fmt.substr(i, 2) == "%M") {
i++;
part.str += module_name.str();
} else {
if (!part.str.empty()) {
part.type = FmtPart::STRING;