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Merge pull request #1605 from YosysHQ/iopad_fix

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iopad mapping should take care of existing io buffers
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Miodrag Milanović 2020-01-01 17:46:45 +01:00 • committed by GitHub
commit 6620b4e94e
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2 changed files with 22 additions and 0 deletions
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3
passes/techmap/iopadmap.cc
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@ -234,6 +234,9 @@ struct IopadmapPass : public Pass {
SigBit wire_bit(wire, i); SigBit wire_bit(wire, i);
Cell *tbuf_cell = nullptr; Cell *tbuf_cell = nullptr;
if (skip_wire_bits.count(wire_bit))
continue;
if (tbuf_bits.count(wire_bit)) if (tbuf_bits.count(wire_bit))
tbuf_cell = tbuf_bits.at(wire_bit); tbuf_cell = tbuf_bits.at(wire_bit);

19
tests/arch/xilinx/bug1605.ys Normal file
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@ -0,0 +1,19 @@
read_verilog <<EOT
module top(inout io);
wire in;
wire t;
wire o;
IOBUF IOBUF(
.I(in),
.T(t),
.IO(io),
.O(o)
);
endmodule
EOT
synth_xilinx
cd top
select -assert-count 1 t:IOBUF
select -assert-none t:* t:IOBUF %d