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Format macc.v

This commit is contained in:
Eddie Hung 2019-09-19 11:02:14 -07:00
parent 29d446d758
commit 65fa8adf6c

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@ -13,13 +13,13 @@ reg [(A_WIDTH + B_WIDTH - 1):0] reg_tmp_c;
assign c = reg_tmp_c; assign c = reg_tmp_c;
always @(posedge clk) always @(posedge clk)
begin begin
if(set) if(set)
begin begin
reg_tmp_c <= 0; reg_tmp_c <= 0;
end end
else else
begin begin
reg_tmp_c <= a * b + c; reg_tmp_c <= a * b + c;
end end
end end
endmodule endmodule