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Merge pull request #187 from Silimate/cxxrtl-sim

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expose write_cxxrtl into frontend and add support for $buf and $icg
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Akash Levy 2026-06-11 16:06:46 -07:00 • committed by GitHub
commit 61c47fde32
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2 changed files with 20 additions and 2 deletions
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1
Makefile
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@ -917,6 +917,7 @@ include $(YOSYS_SRC)/backends/verilog/Makefile.inc
include $(YOSYS_SRC)/backends/rtlil/Makefile.inc
include $(YOSYS_SRC)/backends/json/Makefile.inc
include $(YOSYS_SRC)/backends/blif/Makefile.inc
include $(YOSYS_SRC)/backends/cxxrtl/Makefile.inc
include $(YOSYS_SRC)/techlibs/common/Makefile.inc

21
backends/cxxrtl/cxxrtl_backend.cc
View file

@ -200,7 +200,7 @@ bool is_extending_cell(RTLIL::IdString type)
bool is_inlinable_cell(RTLIL::IdString type)
{
return is_unary_cell(type) || is_binary_cell(type) || type.in(
ID($mux), ID($concat), ID($slice), ID($pmux), ID($bmux), ID($demux), ID($bwmux));
ID($mux), ID($concat), ID($slice), ID($pmux), ID($bmux), ID($demux), ID($bwmux), ID($buf));
}
bool is_ff_cell(RTLIL::IdString type)
@ -1133,8 +1133,11 @@ struct CxxrtlWorker {
void dump_cell_expr(const RTLIL::Cell *cell, bool for_debug = false)
{
// Buffers
if (cell->type == ID($buf)) {
dump_sigspec_rhs(cell->getPort(ID::A), for_debug);
// Unary cells
if (is_unary_cell(cell->type)) {
} else if (is_unary_cell(cell->type)) {
f << cell->type.substr(1);
if (is_extending_cell(cell->type))
f << '_' << (cell->getParam(ID::A_SIGNED).as_bool() ? 's' : 'u');
@ -1517,6 +1520,20 @@ struct CxxrtlWorker {
dump_sigspec_rhs(cell->getPort(ID::CLR));
f << (cell->getParam(ID::CLR_POLARITY).as_bool() ? "" : ".bit_not()") << ");\n";
}
// ICG cells GCLK = CLK & (EN | SE)
} else if (cell->type == ID($icg)) {
f << indent;
dump_sigspec_lhs(cell->getPort(ID::GCLK), for_debug);
f << " = ";
dump_sigspec_rhs(cell->getPort(ID::CLK), for_debug);
f << ".bit_and(";
dump_sigspec_rhs(cell->getPort(ID::EN), for_debug);
if (cell->hasPort(ID::SE)) {
f << ".bit_or(";
dump_sigspec_rhs(cell->getPort(ID::SE), for_debug);
f << ")";
}
f << ");\n";
// Internal cells
} else if (is_internal_cell(cell->type)) {
log_cmd_error("Unsupported internal cell `%s'.\n", cell->type);