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Make testcase clearer with \o having its own init

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Eddie Hung 2019-12-11 23:48:09 -08:00
parent 9a892199f7
commit 61a1f3f49b
1 changed files with 2 additions and 0 deletions
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2
tests/sat/initval.ys
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@ -6,6 +6,8 @@ sat -seq 10 -prove-asserts
design -reset design -reset
read_verilog -icells <<EOT read_verilog -icells <<EOT
module top(input clk, i, output o, p); module top(input clk, i, output o, p);
(* init = 1'b0 *)
wire o;
(* init = 1'bx *) (* init = 1'bx *)
wire p = o; wire p = o;
$_DFF_P_ dff (.C(clk), .D(i), .Q(o)); $_DFF_P_ dff (.C(clk), .D(i), .Q(o));