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Merge pull request #6050 from YosysHQ/emil/autoname-rewrite

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autoname: rewrite
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Emil J 2026-07-19 22:10:02 +00:00 • committed by GitHub
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2 changed files with 259 additions and 104 deletions
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51
tests/various/autoname.ys
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@ -78,12 +78,21 @@ module \top
end
end
EOT
design -save fanout_test
logger -expect log "Rename cell .name in top to bcd_.and_B" 1
logger -expect log "Rename cell .name2 in top to c_has_a_long_name_.or_B" 1
logger -expect log "Renamed 2 objects" 1
debug autoname
logger -check-expected
# a selection only limits what gets renamed, never the name that gets picked:
# \a's fanout still counts $name2, even though it isn't selected
design -load fanout_test
logger -expect log "Rename cell .name in top to bcd_.and_B" 1
logger -expect log "Renamed 1 objects" 1
debug autoname c:$name
logger -check-expected
# names are unique
design -reset
read_rtlil <<EOT
@ -177,29 +186,41 @@ end
EOT
design -save order_test
# don't rename prematurely (some objects should be named after $name2)
# wires are named for being cell outputs
logger -expect log "Rename wire .d in top to or_Y" 1
logger -expect log "Rename cell .name2 in top to or_Y_.or_B" 1
logger -expect log "Renamed 2 objects" 1
debug autoname t:$or
logger -check-expected
logger -expect log "Rename wire .e in top to or_Y_.or_B_Y" 1
# $name gets shortest name (otherwise bcd_$__unknown_B)
logger -expect log "Rename cell .name in top to a_.__unknown_A" 1
# another output wire
logger -expect log "Rename wire .e in top to or_Y_.or_B_Y" 1
logger -expect log "Renamed 4 objects" 1
debug autoname
logger -check-expected
# don't rename prematurely (some objects should be named after $name2)
design -load order_test
# $name3 named for lowest fanout wire (otherwise a_$__unknown_A_Y_$and_A)
logger -expect log "Rename cell .name3 in top to or_Y_.or_B_Y_.and_B" 1
# $c gets shortest name, since the cell driving it doesn't have known port
# directions (otherwise a_$__unknown_A_Y)
logger -expect log "Rename wire .c in top to or_Y_.or_B_A" 1
# $name3 named for lowest fanout wire (otherwise a_$__unknown_A_Y_$and_A)
logger -expect log "Rename cell .name3 in top to or_Y_.or_B_Y_.and_B" 1
logger -expect log "Renamed 6 objects" 1
debug autoname
logger -check-expected
# Only selected objects are renamed, but each one gets exactly the name the
# unrestricted run above gave it, whatever the selection.
design -load order_test
logger -expect log "Rename cell .name2 in top to or_Y_.or_B" 1
logger -expect log "Renamed 1 objects" 1
debug autoname t:$or
logger -check-expected
design -load order_test
logger -expect log "Rename wire .d in top to or_Y" 1
logger -expect log "Rename wire .e in top to or_Y_.or_B_Y" 1
logger -expect log "Rename wire .c in top to or_Y_.or_B_A" 1
logger -expect log "Renamed 3 objects" 1
debug autoname w:*
logger -check-expected
# $name3 is named after a chain of objects that all keep their $-names
design -load order_test
logger -expect log "Rename cell .name3 in top to or_Y_.or_B_Y_.and_B" 1
logger -expect log "Renamed 1 objects" 1
debug autoname c:$name3
logger -check-expected