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rtlil: enable single-bit vector wires

This commit is contained in:
Emil J. Tywoniak 2025-05-06 12:02:00 +02:00
parent f60bbe64ac
commit 5e72464a15
5 changed files with 31 additions and 0 deletions

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@ -184,6 +184,7 @@ X(romstyle)
X(S)
X(SET)
X(SET_POLARITY)
X(single_bit_vector)
X(SIZE)
X(SRC)
X(src)