mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-05-28 12:56:30 +00:00
Code Activity

Merge 2ed89e02da into 9d0cdb8551

Browse source
This commit is contained in:
Dhaval 2026-05-23 13:07:47 +08:00 • committed by GitHub
commit 57eac85347
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
2 changed files with 26 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

17
backends/verilog/verilog_backend.cc
View file

@ -387,14 +387,31 @@ void dump_sigspec(std::ostream &f, const RTLIL::SigSpec &sig)
f << "{0{1'b0}}";
return;
}
if (sig.is_fully_const() && GetSize(sig) > 8192) {
f << stringf("{ ");
int i = 0;
auto chunks = sig.chunks();
for (auto it = chunks.rbegin(); it != chunks.rend(); ++it) {
dump_const(f, it->data, 1, 0);
if (it != chunks.rbegin())
f << stringf(", ");
if (i++ % 20 == 19)
f << stringf("\n");
}
f << stringf(" }");
return;
}
if (sig.is_chunk()) {
dump_sigchunk(f, sig.as_chunk());
} else {
f << stringf("{ ");
int i = 0;
auto chunks = sig.chunks();
for (auto it = chunks.rbegin(); it != chunks.rend(); ++it) {
if (it != chunks.rbegin())
f << stringf(", ");
if (i++ % 20 == 19)
f << stringf("\n");
dump_sigchunk(f, *it, true);
}
f << stringf(" }");