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const: represent string constants as string, assert not accessed as bits

This commit is contained in:
Emil J. Tywoniak 2024-07-29 16:38:32 +02:00
parent 960bca0196
commit 498e0498c5
81 changed files with 764 additions and 690 deletions

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@ -17,9 +17,7 @@
*
* ---
*
* The AST frontend library is not a frontend on its own but provides an
* abstract syntax tree (AST) abstraction for the open source Verilog frontend
* at frontends/verilog.
* This is support code for the Verilog frontend at frontends/verilog
*
*/