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Miodrag Milanovic 2026-06-23 07:23:41 +02:00
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docs/source/using_yosys/synthesis/abc.rst
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@ -178,4 +178,3 @@ of carry chains and DSPs, it avoids optimising for a path that isn't the actual
critical path, while the generally-longer paths result in ABC9 being able to
reduce design area by mapping other logic to slower cells with greater logic
density.