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experimenting with test_cell
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4 changed files with 35 additions and 15 deletions
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@ -28,6 +28,7 @@
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#include <string.h>
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#include <algorithm>
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#include <iostream>
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#include <iomanip>
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YOSYS_NAMESPACE_BEGIN
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@ -2424,6 +2425,20 @@ RTLIL::Wire *RTLIL::Module::addWire(RTLIL::IdString name, const RTLIL::Wire *oth
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return wire;
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}
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template<typename AAAA>
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void scream(AAAA* aaa) {
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unsigned char *ptr = reinterpret_cast<unsigned char*>(aaa);
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for (size_t i = 0; i < sizeof(AAAA); ++i) {
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std::cout << std::hex << std::setw(2) << std::setfill('0') << static_cast<int>(ptr[i]) << ' ';
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}
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std::cout << std::endl;
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}
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template<typename AAAA>
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void scream(const char* ctx, AAAA* aaa) {
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log("%s\n", ctx);
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scream(aaa);
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}
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RTLIL::Cell *RTLIL::Module::addCell(RTLIL::IdString name, RTLIL::IdString type)
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{
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RTLIL::Cell *cell = new RTLIL::Cell;
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@ -2431,6 +2446,7 @@ RTLIL::Cell *RTLIL::Module::addCell(RTLIL::IdString name, RTLIL::IdString type)
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log("ptr 0x%016X\n", cell);
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cell->name = name;
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cell->type = type;
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scream("addCell pre", cell);
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if (RTLIL::Cell::is_legacy_type(type)) {
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cell->legacy = new RTLIL::OldCell;
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cell->legacy->name = name;
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@ -2448,6 +2464,7 @@ RTLIL::Cell *RTLIL::Module::addCell(RTLIL::IdString name, RTLIL::IdString type)
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new (&conn.second) SigSpec();
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}
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}
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scream("addCell post", cell);
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add(cell);
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return cell;
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}
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