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https://github.com/YosysHQ/yosys
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Update kernel to avoid bits()
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parent
67e4a0a48a
commit
360a625785
14 changed files with 151 additions and 122 deletions
31
kernel/ff.cc
31
kernel/ff.cc
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@ -287,6 +287,16 @@ FfData FfData::slice(const std::vector<int> &bits) {
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res.pol_clr = pol_clr;
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res.pol_set = pol_set;
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res.attributes = attributes;
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std::optional<Const::Builder> arst_bits;
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if (has_arst)
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arst_bits.emplace(bits.size());
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std::optional<Const::Builder> srst_bits;
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if (has_srst)
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srst_bits.emplace(bits.size());
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std::optional<Const::Builder> init_bits;
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if (initvals)
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init_bits.emplace(bits.size());
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for (int i : bits) {
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res.sig_q.append(sig_q[i]);
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if (has_clk || has_gclk)
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@ -298,12 +308,19 @@ FfData FfData::slice(const std::vector<int> &bits) {
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res.sig_set.append(sig_set[i]);
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}
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if (has_arst)
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res.val_arst.bits().push_back(val_arst[i]);
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arst_bits->push_back(val_arst[i]);
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if (has_srst)
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res.val_srst.bits().push_back(val_srst[i]);
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srst_bits->push_back(val_srst[i]);
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if (initvals)
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res.val_init.bits().push_back(val_init[i]);
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init_bits->push_back(val_init[i]);
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}
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if (has_arst)
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res.val_arst = arst_bits->build();
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if (has_srst)
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res.val_srst = srst_bits->build();
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if (initvals)
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res.val_init = init_bits->build();
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res.width = GetSize(res.sig_q);
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return res;
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}
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@ -688,10 +705,10 @@ void FfData::flip_rst_bits(const pool<int> &bits) {
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for (auto bit: bits) {
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if (has_arst)
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val_arst.bits()[bit] = invert(val_arst[bit]);
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val_arst.set(bit, invert(val_arst[bit]));
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if (has_srst)
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val_srst.bits()[bit] = invert(val_srst[bit]);
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val_init.bits()[bit] = invert(val_init[bit]);
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val_srst.set(bit, invert(val_srst[bit]));
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val_init.set(bit, invert(val_init[bit]));
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}
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}
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@ -760,7 +777,7 @@ void FfData::flip_bits(const pool<int> &bits) {
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Const mask = Const(State::S0, width);
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for (auto bit: bits)
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mask.bits()[bit] = State::S1;
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mask.set(bit, State::S1);
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if (has_clk || has_gclk)
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sig_d = module->Xor(NEW_ID, sig_d, mask);
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