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test dlatchsr and adlatch

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This commit is contained in:
Miodrag Milanovic 2022-02-16 13:58:51 +01:00
parent 271ac28b41
commit 21baf48e04
4 changed files with 94 additions and 4 deletions
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65
tests/sim/tb/tb_dlatchsr.v Executable file
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`timescale 1ns/1ns
module tb_dlatchsr();
reg d = 0;
reg set = 0;
reg clr = 0;
wire q;
dlatchsr uut(.d(d),.set(set),.clr(clr),.q(q));
initial
begin
$dumpfile("tb_dlatchsr");
$dumpvars(0,tb_dlatchsr);
#10
d = 1;
#10
d = 0;
#10
d = 1;
#10
d = 0;
#10
clr = 1;
#10
d = 1;
#10
d = 0;
#10
d = 1;
#10
d = 0;
#10
clr = 0;
#10
d = 1;
#10
d = 0;
#10
d = 1;
#10
d = 0;
#10
set = 1;
#10
d = 1;
#10
d = 0;
#10
d = 1;
#10
d = 0;
#10
set = 0;
#10
d = 1;
#10
d = 0;
#10
d = 1;
#10
d = 0;
#10
$finish;
end
endmodule